Topic: system-on-chip Goto Github
Some thing interesting about system-on-chip
Some thing interesting about system-on-chip
system-on-chip,System on Chip toolkit for Amaranth HDL
Organization: amaranth-lang
system-on-chip,Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals
Organization: arm-university
system-on-chip,Halloween++ (H++) scripting language for microcontrollers including support for OpenThread
User: arnulfrupp
system-on-chip,The Antikernel operating system project
User: azonenberg
system-on-chip,System-on-a-Chip for FPGA, with xr16 RISC core and LCC port
User: biged
Home Page: http://www.fpgacpu.org/xsoc/
system-on-chip,A custom C API for instrumenting Jetson TX1’s SoM and SoC
User: cezs
system-on-chip,:milky_way: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in SystemVerilog. Stage 1, the purpose is to learn how to design a risc-v processor with basic peripherals and the RISC-V instruction set architecture.
User: datnguyen97-vn
system-on-chip,Various lessons learned while designing an OV5640 camera display in VHDL/Embedded Linux on a Cyclone V SOC board
User: davemuscle
Home Page: http://davemuscle.com
system-on-chip,Build your hardware, easily!
User: enjoy-digital
system-on-chip,System-on-Chip Resource Adaptive Scheduling using Deep Reinforcement Learning
Organization: episci
system-on-chip,An online viewer for Chipyard output files
User: fleker
Home Page: https://felker.dev/chipyard-viewer
system-on-chip,Non-intrusive packet delivery monitoring service for Networks-on-Chip (NoCs) focusing on real-time systems. Hardware verification and development in C++/SystemC using the Visual Studio 2017 IDE.
User: gabrielganzer
system-on-chip,Firmware development for a low-cost Vaccine Refrigerator (VARE) using the STM32F407G-DISC1 Microcontroller programmed in C with PlatformIO IDE using the STM32 HAL Library and simulated with Renode™.
User: gabrielganzer
system-on-chip,Image Processing Algorithms on System-on-Chip FPGA Devices using a myRIO as hardware and LabVIEW as software
User: gergo-papp
system-on-chip,Our work during the STM32 workshop that we studied at INSAT.
User: hajali-amine
system-on-chip,Fireboy & Water Girl in the Forest Temple implemented on an FPGA board for UIUC's ECE385 Digital Systems Laboratory.
User: hank0626
system-on-chip,Course handouts for ESE532 at UPenn
Organization: icgrp
Home Page: https://icgrp.github.io/ese532_handouts/
system-on-chip,A RISC-V Mixed Signal System-on-Chip(SoC) produced by integrating RVMyth RISC-V Core with Phase Locked Loop(PLL) as a clock multiplier
User: infini8-13
system-on-chip,LPP's VHD_Lib is a kind of addon to gaisler's grlib with most Laboratory of Plasma Physics VHDL IPs.
User: jeandet
system-on-chip,Reconfigurable Systems on Chip Mini Project
User: joseamador95
system-on-chip,Kactus2 is a graphical EDA tool based on the IP-XACT standard.
Organization: kactus2
Home Page: https://research.tuni.fi/system-on-chip/tools/
system-on-chip,Small Processing Unit 32: A compact RV32I CPU written in Verilog
User: maikmerten
system-on-chip,VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
User: manili
system-on-chip,All projects that utilize the Verilog & SystemVerilog HDL's.
User: mankelly
system-on-chip,The aim of this project is to implement a DVB-S2 Modulator on a SoC (System on Chip)
User: marcelha97
system-on-chip,A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
User: meiniki
system-on-chip,A kernel-mode driver for exposing Linux like mmap(...) to user-mode applications on Windows for direct physical memory access.
User: mhesham
system-on-chip,Chisel implementation of Neural Processing Unit for System on the Chip
User: mpskex
Home Page: https://chisel-opennpu.readthedocs.io/
system-on-chip,TransferCL: an open framework for transfer learning on mobile device
User: ovalery16
system-on-chip,Mixed-Signal Oscilloscope on Chip
User: polymitis
system-on-chip,A Modeling and Verification Platform for SoCs using ILAs
Organization: princetonuniversity
Home Page: https://bo-yuan-huang.gitbook.io/ilang/
system-on-chip,Free collection of hardware modules written in Verilog for FPGAs and embedded systems.
User: riscv-steel
Home Page: https://riscv-steel.github.io/riscv-steel/
system-on-chip,An open-source 32-bit RISC-V soft-core processor
User: saursin
Home Page: https://riscv-atom.readthedocs.io
system-on-chip,Trying to implement a soft core SoC
User: semahawk
system-on-chip,Template project for LiteX-based SoCs
User: sergachev
system-on-chip,Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
Organization: sld-columbia
system-on-chip,A ZYNQ 7020 project that plays breakout via HDMI.
User: snrnothere16
system-on-chip,Development platform for the Espressif ESP32 WiFi/Microcontroller SoC
Organization: sparkfun
system-on-chip,:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
User: stnolting
system-on-chip,:desktop_computer: A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
User: stnolting
Home Page: https://neorv32.org
system-on-chip,QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
User: sy2002
Home Page: http://qnice-fpga.com
system-on-chip,OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Organization: the-openroad-project
Home Page: https://openlane.readthedocs.io/
system-on-chip,A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
Organization: tinyretrowarehouse
system-on-chip,Basic RISC-V Test SoC
User: ultraembedded
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