ultraembedded / core_sdram_axi4 Goto Github PK

We are using sdram in our FPGA board. Our SDRAM same that you have given project.
So I am working with your code. I want to create axi ip from your code and use it with the microblaze. I cannot port map Some signals in the top module with AXI4 peripheral in the creation of AXI ip. I gave the picture that I have stucked.

testbench.h: In constructor ‘testbench::testbench(sc_core::sc_module_name)’:
testbench_vbase.h:12:41: error: invalid new-expression of abstract class type ‘VerilatedVcdSc’
VerilatedVcdSc *v_vcd = new VerilatedVcdSc;
^
testbench.h:84:9: note: in expansion of macro ‘verilator_trace_enable’
verilator_trace_enable("verilator.vcd", m_dut);
^
In file included from testbench_vbase.h:6:0,
from testbench.h:2,
from main.cpp:2:
/usr/share/verilator/include/verilated_vcd_sc.h:36:7: note: because the following virtual functions are pure within ‘VerilatedVcdSc’: class VerilatedVcdSc

please close the issue, we got the core working at 166MHz too. Excellent!

Hello, I isntalled SystemC on my device to use your code, I faced a problem similar to an issue in this repository, the compiler complains from the existing of virtual function in inherited class.

These two functions in sc_trace.h file were:

    DECL_TRACE_METHOD_A( sc_event )
    DECL_TRACE_METHOD_A( sc_time )

The macro expansion is:

#define DECL_TRACE_METHOD_A(tp)           \
    virtual void trace( const tp& object,                \
                        const std::string& name ) = 0;

All previous in class sc_trace_file namespace sc_signal_in_if

What I did to solve the problem is that I commented the first two lines:

    // DECL_TRACE_METHOD_A( sc_event )
    // DECL_TRACE_METHOD_A( sc_time )

And I was able to compile the code successfully and generating the executable

The problem now is VCD file is not generated, and after I run the executable I get this message:

...
...
READ: 0005e2e1=e1
READ: 0005e2e1=e1
READ: 0005e2e2=e2
READ: 0005e2e2=e2
READ: 0005e2e3=e3
READ: 0005e2e3=e3
READ: 0005e2e4=e4
READ: 0005e2e4=e4
Completed memory test sequence...

Info: /OSCI/SystemC: Simulation stopped by user.
makefile:27: recipe for target 'run' failed
make: *** [run] Segmentation fault (core dumped)

Any idea how to generate the VCD file?