ultraembedded / core_sdram_axi4 Goto Github PK
View Code? Open in Web Editor NEWSDRAM controller with AXI4 interface
License: GNU General Public License v3.0
SDRAM controller with AXI4 interface
License: GNU General Public License v3.0
We are using sdram in our FPGA board. Our SDRAM same that you have given project.
So I am working with your code. I want to create axi ip from your code and use it with the microblaze. I cannot port map Some signals in the top module with AXI4 peripheral in the creation of AXI ip. I gave the picture that I have stucked.
testbench.h: In constructor ‘testbench::testbench(sc_core::sc_module_name)’:
testbench_vbase.h:12:41: error: invalid new-expression of abstract class type ‘VerilatedVcdSc’
VerilatedVcdSc *v_vcd = new VerilatedVcdSc;
^
testbench.h:84:9: note: in expansion of macro ‘verilator_trace_enable’
verilator_trace_enable("verilator.vcd", m_dut);
^
In file included from testbench_vbase.h:6:0,
from testbench.h:2,
from main.cpp:2:
/usr/share/verilator/include/verilated_vcd_sc.h:36:7: note: because the following virtual functions are pure within ‘VerilatedVcdSc’: class VerilatedVcdSc
please close the issue, we got the core working at 166MHz too. Excellent!
Hello, I isntalled SystemC on my device to use your code, I faced a problem similar to an issue in this repository, the compiler complains from the existing of virtual function in inherited class.
These two functions in sc_trace.h
file were:
DECL_TRACE_METHOD_A( sc_event )
DECL_TRACE_METHOD_A( sc_time )
The macro expansion is:
#define DECL_TRACE_METHOD_A(tp) \
virtual void trace( const tp& object, \
const std::string& name ) = 0;
All previous in class sc_trace_file
namespace sc_signal_in_if
What I did to solve the problem is that I commented the first two lines:
// DECL_TRACE_METHOD_A( sc_event )
// DECL_TRACE_METHOD_A( sc_time )
And I was able to compile the code successfully and generating the executable
The problem now is VCD file is not generated, and after I run the executable I get this message:
...
...
READ: 0005e2e1=e1
READ: 0005e2e1=e1
READ: 0005e2e2=e2
READ: 0005e2e2=e2
READ: 0005e2e3=e3
READ: 0005e2e3=e3
READ: 0005e2e4=e4
READ: 0005e2e4=e4
Completed memory test sequence...
Info: /OSCI/SystemC: Simulation stopped by user.
makefile:27: recipe for target 'run' failed
make: *** [run] Segmentation fault (core dumped)
Any idea how to generate the VCD file?
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.