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Parser should be able to infer that (%rax, %rcx) has an implicit scale value of 1.

Not sure why, but the E character in hex strings disappeared in a few places.

The title says it all.

Both operands are W.
Both should be RW.

From jason koenig --

Stoke generates instructions like:
leaw -0x1(%rax,8), %r11w
which are ill-formed according to the "att" parser because they lack a base register. GNU as gives an warning for this code. It should be:
leaw -0x1(,%rax,8), %r11w
This can be fixed by changing line 91 in x64asm/src/m.cc:
if (contains_base() && contains_index()) {
to
if (contains_index()) {
i.e. the comma needs to be printed if there is an index register/multiplier regardless of whether there is a base.

There are probably still bugs.

For my work I needed to get the set of possibly read and possibly written registers from a Code class. For the moment, it's implemented in my stoke branch, but it's somewhat out of place. Do you think it would make sense to add such functions here?

They're truly short functions, just 5/6 lines each.

Will do asap.

Executing hex for AVX instructions throws SIGILL.

Rl has basically become the same thing as R8 now. Let's get rid of it before we go and fix up stoke.

HIGH PRIORITY SINCE STOKE IS BROKEN.

The presence of Unicode non-ASCII codepoints caused building to fail on Ubuntu 13.10 with default package versions. (That is, system built according to instructions in repo.) See pull request #24.

SImilar to previous issue.
Shouldn't be able to emit rh in an instruction that requires a rex prefix.

Current code is a placeholder.

g++ prefers register immediate rather than specialized for rax.
See output of make check.

This isn't technically a bug.
It would just be nice to match the output of g++ exactly.

Can't fix with the code in its current state.
g++ selects variants based on the rex prefix of its arguments which the type system is unable to represent.

These instructions are correct, just not as short as possible.

Revert and get back to issue 40 when we have time.

is_return() covers RET, IRET, and SYSRET.

Let's add functions for all of these.

Will not fix; can't figure out how to get g++ to emit this instruction.

This is documented in the comments in the function too. In particular it would be good to implement support for push and pop.

In the spreadsheet
LDDQU xmm1, mem
should be replaced by
LDDQU xmm1, m128

If I make the change I get compilation errors.

Will not fix for now; can't figure out how to get g++ to emit this instruction.

The x64asm type system is insufficient for preventing users from requesting instruction such as:

crc32 %r12, %ah

(This shouldn't be allowed due to %r12 requiring a rex prefix.)

This occurs for other instructions in similar situations, such as when a memory operand requires an rex prefix. Fixing this issue will require a major re-architecting. I'd prefer to stay away from this is possible.

Known opcodes with this issue --

• crc32
• movsx
• movzx

Title says it all.

Low priority --

Now that Rh and Rl are subclasses of Rb, it would be nice to rename Rb to reflect the symmetry with the rest of the general purpose register classes.

If we do this, we should leave a typedef from R8 to Rb just to preserve backwards compatibility for dependent code.

(Berkeley is taking ownership of this). I'm adding functionality to see if a given instruction is a call (e.g. call or syscall). This means having codegen make a new table and having the x64asm library slurp it in. Creating a new branch based on this ticket number.

I'm having trouble with /bin/stoke because it always counts the number of binaries, which is different depending on whether or not the test suite has been built. It also differs between branches. In this branch, I remove this sanity check.

Also, make clean needs to delete all binaries besides /bin/stoke in the /bin folder, so that binaries from one branch aren't present when working in the other.

xorl %edx, %edx (segfaults when executed; extra 0x02)

The title is self-explanatory. instr.must_write_set() and instr.must_read_set() should both return rsp for all push/pop variants.

%rax is used for variable arguments, and is a parameter to function calls in the ABI.

At some point I overloaded RegSet's stream operator before I knew that RegSetWriter was the best place to put that stuff. I'll clean this up sometime soon.

Give them to me.

Most assemblers seem to be happy using ; as a comment. I don't think ours supports this. Low priority.

Spreadsheet has non-ascii characters in it, and manually exporting to .csv every time we make a bug fix is just awful.

Let's pick a more readable/editable tab formatting and edit the .csv directly from now on.

Iopl bits in rflags span 2 bits, not 1.

Can't fix with code in current state.
The preference mechanism in the spreadsheet isn't sufficient for expressing g++'s decision process.

Code is correct.
Will fix later.

I don't want to break anything, so I won't change this function quite yet. The name of these function doesn't quite match up to what they are though: linux_caller_save() currently returns the list of all registers used as parameters; however, the caller must also save rax, r9, r10 and r11, which aren't parameters.

I also have a really hard time with the names callee/caller save, but that's probably just me, so my current solution is to define four new additional functions:
linux_call_parameters()
linux_call_scratch()
linux_call_preserved()
linux_call_return() (including rax, rdx, xmm0, xmm1)

that return the appropriate sets of registers.

movl $0x0, %eax

Preserve their original values for printing.

Self explanatory. We need these copy constructors in other code.

addl $150, %edx

assembles into:

add $0xffffff96,%edx

Complete listing of opcode with this issue is below --

• bswap
• call with relative offset
• jump with relative offset
• loop
• push imm16
• vcvtdq2pd ymm ymm
• vmov variants
• xchg with rax operand

I have had some code for this for a while. It does things a little different then RegSet writer. I'm just creating this so I can make an appropriately named branch for the merge.

Won't fix; can't get g++ to emit this instruction.

See make check.

Will not fix; can't figure out how to get g++ to emit this instruction.

This would be nice.

Sure would.

STOKE needs a linker now that we're ready to start sandboxing functions that use the call instruction.

I think this is actually really easy. All we need to do is store a symbol table in functions rather in the assembler. (And for our purposes, all the symbol table is is a mapping from labels to code offsets and jump locations). If a function has that, it can figure out the global offset for labels because it knows the offset that its buffer begins at.

From there, all a linker will have to do redo the offsets.

Assuming you're only working with a single function, the assembler should continue to work exactly as it used to.