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ddr4_controller

dem

Dynamic Energy Management for Network-on-Chip based Chip Multiprocessors

device-modeling-language

diagrammer

Provides dot visualizations of chisel/firrtl circuits

digital-hardware-modelling

Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)

diplomacy

diplomatictester

VIP library for you TileLink IP

displayport_verilog

A Verilog implementation of DisplayPort protocol for FPGAs

distortos

object-oriented C++ RTOS for microcontrollers

diva-dram

This repository provides characterization data collected over 96 DDR3 SO-DIMMs, related to the following paper: Lee et al., "Design-Induced Latency Variation in Modern DRAM Chips: Characterization, Analysis, and Latency Reduction Mechanisms", SIGMETRICS 2017. https://people.inf.ethz.ch/omutlu/pub/DIVA-low-latency-DRAM_sigmetrics17-paper.pdf

django_website

CompSoc website running on Django!

docs

OpenROAD Documentation

docs-as-code-workshop

PyCon APAC 2020 Workshop

docs-dev-guide

Documentation developer guide

docs-resources

docs-spec-template

downkyi

哔哩下载姬downkyi，B站视频下载工具，支持批量下载，支持8K、HDR、杜比视界，提供工具箱（音视频提取、去水印等）。

dram-hammers

dramcontroller1.2

drampetri

Modelling DRAMs with Petrinets

drampower

Fast and accurate DRAM power and energy estimation tool

drampowertraces

Trace files for the DRAMPower tool at ravenrd/DRAMPower

dramsim2

DRAMSim2: A cycle accurate DRAM simulator

dramsim3

DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator

dramsim_systemc

dramsimu

for ddr4/ddr3 simulation

dramspec

A High-Level DRAM Timing, Power and Area Exploration Tool

dramsys

DRAMSys4.0 a SystemC TLM-2.0 based DRAM simulator.

dramvis

A visualization and comparison tool for DRAMSim2

dromajo

RISC-V RV64GC emulator designed for RTL co-simulation