mkdir -p tmp
vivado -nolog -nojournal -mode batch -source scripts/hwdef.tcl -tclargs oscillo
****** Vivado v2015.4 (64-bit)
**** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015
**** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source scripts/hwdef.tcl
# set project_name [lindex $argv 0]
# open_project tmp/$project_name.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/vanderbruggen/ownCloud/zynq-sdk/tmp/cores'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2015.4/data/ip'.
# if {[get_property PROGRESS [get_runs synth_1]] != "100%"} {
# launch_runs synth_1
# wait_on_run synth_1
# }
[Fri Dec 25 13:51:25 2015] Launched synth_1...
Run output will be captured here: /home/vanderbruggen/ownCloud/zynq-sdk/tmp/oscillo.runs/synth_1/runme.log
[Fri Dec 25 13:51:25 2015] Waiting for synth_1 to finish...
*** Running vivado
with args -log system_wrapper.vds -m64 -mode batch -messageDb vivado.pb -notrace -source system_wrapper.tcl
****** Vivado v2015.4 (64-bit)
**** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015
**** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source system_wrapper.tcl -notrace
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/vanderbruggen/ownCloud/zynq-sdk/tmp/cores'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2015.4/data/ip'.
Command: synth_design -top system_wrapper -part xc7z010clg400-1 -fanout_limit 400 -fsm_extraction one_hot -keep_equivalent_registers -resource_sharing off -no_lc -shreg_min_size 5
Starting synth_design
Attempting to get a license for feature 'Synthesis' and/or device 'xc7z010'
WARNING: [Common 17-348] Failed to get the license for feature 'Synthesis' and/or device 'xc7z010'
3 Infos, 1 Warnings, 0 Critical Warnings and 1 Errors encountered.
synth_design failed
ERROR: [Common 17-345] A valid license was not found for feature 'Synthesis' and/or device 'xc7z010'. Please run the Vivado License Manager for assistance in determining
which features and devices are licensed for your system.
Resolution: Check the status of your licenses in the Vivado License Manager. For debug help search Xilinx Support for "Licensing FAQ".
INFO: [Common 17-206] Exiting Vivado at Fri Dec 25 13:51:35 2015...
[Fri Dec 25 13:51:39 2015] synth_1 finished
wait_on_run: Time (s): cpu = 00:00:02 ; elapsed = 00:00:14 . Memory (MB): peak = 1018.730 ; gain = 0.000 ; free physical = 657 ; free virtual = 10353
# write_hwdef -force -file tmp/$project_name.hwdef
# close_project
INFO: [Common 17-206] Exiting Vivado at Fri Dec 25 13:51:41 2015...
mkdir -p tmp/oscillo.fsbl
hsi -nolog -nojournal -mode batch -source scripts/fsbl.tcl -tclargs oscillo ps7_cortexa9_0
****** hsi v2015.4 (64-bit)
**** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source scripts/fsbl.tcl
# set project_name [lindex $argv 0]
# set proc_name [lindex $argv 1]
# set hard_path tmp/$project_name.hard
# set fsbl_path tmp/$project_name.fsbl
# file mkdir $hard_path
# file copy -force tmp/$project_name.hwdef $hard_path/$project_name.hdf
# open_hw_design $hard_path/$project_name.hdf
# create_sw_design -proc $proc_name -os standalone fsbl
INFO: [Hsi 55-1698] elapsed time for repository loading 0 seconds
# add_library xilffs
# add_library xilrsa
# generate_app -proc $proc_name -app zynq_fsbl -dir $fsbl_path -compile
Running Make include in ps7_cortexa9_0/libsrc/bram_v4_0/src
Running Make include in ps7_cortexa9_0/libsrc/coresightps_dcc_v1_2/src
Running Make include in ps7_cortexa9_0/libsrc/cpu_cortexa9_v2_1/src
Running Make include in ps7_cortexa9_0/libsrc/ddrps_v1_0/src
Running Make include in ps7_cortexa9_0/libsrc/devcfg_v3_3/src
Running Make include in ps7_cortexa9_0/libsrc/dmaps_v2_1/src
Running Make include in ps7_cortexa9_0/libsrc/emacps_v3_1/src
Running Make include in ps7_cortexa9_0/libsrc/gpiops_v3_1/src
Running Make include in ps7_cortexa9_0/libsrc/gpio_v4_0/src
Running Make include in ps7_cortexa9_0/libsrc/iicps_v3_0/src
Running Make include in ps7_cortexa9_0/libsrc/qspips_v3_2/src
Running Make include in ps7_cortexa9_0/libsrc/scugic_v3_1/src
Running Make include in ps7_cortexa9_0/libsrc/scutimer_v2_1/src
Running Make include in ps7_cortexa9_0/libsrc/scuwdt_v2_1/src
Running Make include in ps7_cortexa9_0/libsrc/sdps_v2_6/src
Running Make include in ps7_cortexa9_0/libsrc/spips_v3_0/src
Running Make include in ps7_cortexa9_0/libsrc/standalone_v5_3/src
Running Make include in ps7_cortexa9_0/libsrc/sysmon_v7_1/src
Running Make include in ps7_cortexa9_0/libsrc/ttcps_v3_0/src
Running Make include in ps7_cortexa9_0/libsrc/uartps_v3_1/src
Running Make include in ps7_cortexa9_0/libsrc/usbps_v2_2/src
Running Make include in ps7_cortexa9_0/libsrc/xadcps_v2_2/src
Running Make include in ps7_cortexa9_0/libsrc/xilffs_v3_1/src
Running Make include in ps7_cortexa9_0/libsrc/xilrsa_v1_1/src
Running Make libs in ps7_cortexa9_0/libsrc/bram_v4_0/src
Compiling bram
arm-xilinx-eabi-ar: creating ../../../lib/libxil.a
Running Make libs in ps7_cortexa9_0/libsrc/coresightps_dcc_v1_2/src
Compiling coresightps_dcc
Running Make libs in ps7_cortexa9_0/libsrc/cpu_cortexa9_v2_1/src
Compiling cpu_cortexa9
Running Make libs in ps7_cortexa9_0/libsrc/ddrps_v1_0/src
Compiling ddrps
Running Make libs in ps7_cortexa9_0/libsrc/devcfg_v3_3/src
Compiling devcfg
Running Make libs in ps7_cortexa9_0/libsrc/dmaps_v2_1/src
Compiling dmaps
Running Make libs in ps7_cortexa9_0/libsrc/emacps_v3_1/src
Compiling emacps
Running Make libs in ps7_cortexa9_0/libsrc/gpiops_v3_1/src
Compiling gpiops
Running Make libs in ps7_cortexa9_0/libsrc/gpio_v4_0/src
Compiling gpio
Running Make libs in ps7_cortexa9_0/libsrc/iicps_v3_0/src
Compiling iicps
Running Make libs in ps7_cortexa9_0/libsrc/qspips_v3_2/src
Compiling qspips
Running Make libs in ps7_cortexa9_0/libsrc/scugic_v3_1/src
Compiling scugic
Running Make libs in ps7_cortexa9_0/libsrc/scutimer_v2_1/src
Compiling scutimer
Running Make libs in ps7_cortexa9_0/libsrc/scuwdt_v2_1/src
Compiling scuwdt
Running Make libs in ps7_cortexa9_0/libsrc/sdps_v2_6/src
Compiling sdps
Running Make libs in ps7_cortexa9_0/libsrc/spips_v3_0/src
Compiling spips
Running Make libs in ps7_cortexa9_0/libsrc/standalone_v5_3/src
Compiling standalone
Running Make libs in ps7_cortexa9_0/libsrc/sysmon_v7_1/src
Compiling sysmon
Running Make libs in ps7_cortexa9_0/libsrc/ttcps_v3_0/src
Compiling ttcps
Running Make libs in ps7_cortexa9_0/libsrc/uartps_v3_1/src
Compiling uartps
Running Make libs in ps7_cortexa9_0/libsrc/usbps_v2_2/src
Compiling usbps
Running Make libs in ps7_cortexa9_0/libsrc/xadcps_v2_2/src
Compiling xadcps
Running Make libs in ps7_cortexa9_0/libsrc/xilffs_v3_1/src
Compiling XilFFs Library
Running Make libs in ps7_cortexa9_0/libsrc/xilrsa_v1_1/src
Finished building libraries
generate_target: Time (s): cpu = 00:00:06 ; elapsed = 00:00:06 . Memory (MB): peak = 406.582 ; gain = 0.000 ; free physical = 796 ; free virtual = 10506
gmake[1]: Entering directory `/home/vanderbruggen/ownCloud/zynq-sdk/tmp/oscillo.fsbl'
arm-xilinx-eabi-gcc -MMD -MP -c fsbl_hooks.c -o fsbl_hooks.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c image_mover.c -o image_mover.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c main.c -o main.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c md5.c -o md5.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c nand.c -o nand.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c nor.c -o nor.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c pcap.c -o pcap.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c ps7_init.c -o ps7_init.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c qspi.c -o qspi.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c rsa.c -o rsa.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c sd.c -o sd.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -MMD -MP -c fsbl_handoff.S -o fsbl_handoff.o -Izynq_fsbl_bsp/ps7_cortexa9_0/include -I.
arm-xilinx-eabi-gcc -o executable.elf fsbl_hooks.o image_mover.o main.o md5.o nand.o nor.o pcap.o ps7_init.o qspi.o rsa.o sd.o fsbl_handoff.o -MMD -MP -lrsa -Wl,--start-group,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lxilffs,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lrsa,-lxil,-lgcc,-lc,--end-group -Wl,--gc-sections -Lzynq_fsbl_bsp/ps7_cortexa9_0/lib -L./ -Tlscript.ld
gmake[1]: Leaving directory `/home/vanderbruggen/ownCloud/zynq-sdk/tmp/oscillo.fsbl'
generate_app: Time (s): cpu = 00:00:14 ; elapsed = 00:00:16 . Memory (MB): peak = 406.582 ; gain = 0.000 ; free physical = 799 ; free virtual = 10505
# close_hw_design [current_hw_design]
INFO: [Common 17-206] Exiting hsi at Fri Dec 25 13:51:59 2015...
mkdir -p tmp
vivado -nolog -nojournal -mode batch -source scripts/bitstream.tcl -tclargs oscillo
****** Vivado v2015.4 (64-bit)
**** SW Build 1412921 on Wed Nov 18 09:44:32 MST 2015
**** IP Build 1412160 on Tue Nov 17 13:47:24 MST 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source scripts/bitstream.tcl
# set project_name [lindex $argv 0]
# open_project tmp/$project_name.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository '/home/vanderbruggen/ownCloud/zynq-sdk/tmp/cores'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/opt/Xilinx/Vivado/2015.4/data/ip'.
# if {[get_property PROGRESS [get_runs impl_1]] != "100%"} {
# launch_runs impl_1 -to_step route_design
# wait_on_run impl_1
# }
ERROR: [Common 17-70] Application Exception: Failed to launch run 'impl_1' due to failures in the following run(s):
synth_1
These failed run(s) need to be reset prior to launching 'impl_1' again.
INFO: [Common 17-206] Exiting Vivado at Fri Dec 25 13:52:09 2015...
make: *** [tmp/oscillo.bit] Error 1