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-radar-display-using-fpga

Radar plan position indicator (PPI) is used to display the range and Azimuth of a target as a dot inside range circles, a scanning line usually represents the direction of the Radar antenna. In order to implement a Radar PPI on FPGA a VGA controller must be designed in VHDL, this VGA controller must provide the correct timing and data to display th

100-days-of-ml-code

100 Days of ML Coding

1009-gps_derived_rf_generator

Arduino code for GPS Referenced RF generator

100gbe-pynq

10ghz-dro

Designed and built of a 10GHz Dielectric Oscillator

1t4r-24g-multi-lane-multi-vechile-fmcw-traffic-radar-simulator

1T4R 24G Multi-lane Multi-vechile FMCW Traffic Radar Simulator

32-verilog-mini-projects

Implementing 32 Verilog Mini Projects.

3d-dic_imu_radar_system

pyserial, system for development of 3D-DIC measurements.

3d-mimo-sar_imaging

4ch-rf-fe

4-channel RF Front End design

4d-latte-4d-radar-drivable-area-automatic-labelling-using-advanced-deep-learning

First 4D Radar Automatic Labelling tools using Segment Anything (SA) drivable area segmentation on camera using Deep Learning for Autonomous Vehicle

500-ai-machine-learning-deep-learning-computer-vision-nlp-projects-with-code

500 AI Machine learning Deep learning Computer vision NLP Projects with code

5g-antenna

Design of a microstrip patch antenna that will be used for 5G networks using CST.

6.111-digiteyez

6.111-final-project

6.111 Final Project

6.111-final-project-dso

6.111-final-project2

6.111-final-project

6.111-labs-project

Verilog code for labs and final project for 6.111 (Digital Systems Lab)

6.111-projectedpiano

6.111 Final Project - Projected Piano

6.111finalproject3

6111-heartaware

A simple pulse oximetry system for the Xilinx Artix 7-based Nexys 4 DDR board. MIT 6.111 Fall 2015 Final Project.

6301-lab3-mixed-signal-temperature-sensor

Mixed-signal temperature sensor board. MIT 6.301 Fall 2016 Final Project.

8ghzgesturedataset

Radar-based gesture dataset (IMEC's 8Ghz radar)

a-dds

HDL code for a DDS (direct digital synthesizer) with AXI stream interface

a-remote-hand-gesture-recognition-system

This project aims to use Intel FPGA as data processor and Xilinx Ego1 as operator, to implement a Remote Hand Gesture Recognition System (RHGRS). We use Terasic DE10-Nano Kit and Xilinx Ego1 co-design as our developing and implementing method.

acoustic-source-localization-system

BSc Thesis: Acoustic source localization embedded system to estimate direction of sound arrival using time difference between sound wave arrival to 4 microphones.

acquisition_emg_multiprocessing

Acquisition of EMG signals (single channel) using multiprocessing with Esp32 and receiving the data in Python. Adapted from code by Daniel C.

active-passive-uwb-ros

ROS Nodes for active (ToF) and passive (TDoA) localization using UWB modules

ad8368_agc

ad9912_ti-tm4c123gxl

Analog Devices AD9912 interface through TI TM4C123GXL ARM processor.