All signals except TDATA are "not present" about cocotbext-axi HOT 5 OPEN

I think your AxiStreamBus.from_entity(self.dut.axi_s_if) is wrong. Of what type is self.dut.axi_s_if? I use it as follow and it works great:

    self.source_bus = AxiStreamBus(dut, "S")
    self.source_driver = AxiStreamSource(self.source_bus, dut.Clk, dut.Rst)

The corresponding signals are then called S_Tvalid, S_Tdata.....

self.dut.axi_s_if is an Interface, you addressing a bus by a "classic" way like with "from_prefix()" method. This way does not suitable for me.

from cocotbext-axi.

I think your AxiStreamBus.from_entity(self.dut.axi_s_if) is wrong. Of what type is self.dut.axi_s_if?
I use it as follow and it works great:

    self.source_bus = AxiStreamBus(dut, "S")
    self.source_driver = AxiStreamSource(self.source_bus, dut.Clk, dut.Rst)

The corresponding signals are then called S_Tvalid, S_Tdata.....

from cocotbext-axi.

Can you post the SV interfaces that you're using? At some point I want to collect a bunch of real-world interface definitions and toss them into the unit tests to make sure stuff is getting detected correctly. I also need to do make the name matching more flexible, I just haven't had time to work on any of this recently.

from cocotbext-axi.

Can you post the SV interfaces that you're using? At some point I want to collect a bunch of real-world interface definitions and toss them into the unit tests to make sure stuff is getting detected correctly. I also need to do make the name matching more flexible, I just haven't had time to work on any of this recently.

I cannot publish Interface file. But it contains all signals from AXI4-Stream spec, i.e.
TDATA,
TLAST,
TKEEP,
TUSER,
TVALID,
TREADY
I think I've found the problem: For its discovery you need to launch remote_pdb and see at Bus constructor "init" in cocotb_bus/bus.py file (official cocotb_bus lib). (I'll omit line's numbers because they shifted because of "breakpoints")
See in this loop "for attr_name, sig_name in _build_sig_attr_dict(optional_signals).items():" where "optional signals" must be founded.
Here are some Pdb logs:

(Pdb) p dir(entity)
['ACLK', 'ARESETn', 'TDATA', 'TID', 'TKEEP', 'TLAST', 'TREADY', 'TUSER', 'TVALID', '_HierarchyObject__get_sub_handle_by_name', 'class', 'delattr', 'dict', 'dir', 'doc', 'eq', 'format', 'ge', 'getattr', 'getattribute', 'gt', 'hash', 'init', 'init_subclass', 'iter', 'le', 'len', 'lt', 'module', 'ne', 'new', 'reduce', 'reduce_ex', 'repr', 'setattr', 'sizeof', 'str', 'subclasshook', 'weakref', '_child_path', '_compat_mapping', '_def_file', '_def_name', '_discover_all', '_discovered', '_fullname', '_handle', '_id', '_invalid_sub_handles', '_len', '_log', '_name', '_path', '_sub_handle_key', '_sub_handles', '_type', 'get_definition_file', 'get_definition_name']
(Pdb) p signame
'tvalid'
(Pdb) !hasattr(entity, signame)
False
(Pdb) !hasattr(entity,'tvalid')
False
(Pdb) !hasattr(entity,'TVALID')
True

Comparing to previous loop which finds "main" signals, this has hasattr() function which checks if "optional signal" is exist. And it's case-sensitive.
Now I am not sure if it is your's library bug.
I've opened issue in cocotb-bus repo: cocotb/cocotb-bus#45

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You can see in cocotb/cocotb-bus#45 that I've found temporary solution. But here we get the next problem (I think it is related not only to AXI4-Stream but for any bus):
In AxiStreamBase's constructor (axis.py file) there is a piece of code that "sets immediate value" on the axi-bus. And it assumed that inner buses (such as TUSER) do not have structure. In my case, TUSER bus is not just a set of bits but a signal with user-defined structure. I.e. TUSER=MY_TYPE1+MY_TYPE2+MY_TYPE... where MY_TYPE1=SOME_TYPE1+SOME_TYPE2+...
It is a powerful feature of SystemVerilog to define custom types, so I think this feature should be supported by this library too.
See: cocotb/cocotb-bus#46

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