- ๐ Hi, Iโm @sidhantp1906
- ๐ Iโm interested in VLSI Systom on chip design
- ๐ฑ Iโm currently a student with enthusiasm in digital VLSI
- ๐๏ธ Iโm looking to collaborate with VLSI teams/companies
- ๐ซ reach me ..through linkedin -sidhant priyadarshi
sidhantp1906 / amba4-apb Goto Github PK
View Code? Open in Web Editor NEWAdvanced Pheripheral Bus design using verilog HDL
License: Apache License 2.0