How to understand the syntax of “0(a0)” ?And what's the meaning of "puts" and "shutdown"? about riscv-asm-manual HOT 10 CLOSED

puts and shutdown are functions. puts is a standard C library routine, and writes a string to stdout. shutdown is a UNIX system command to turn off a computer, the function is emulating this command.

Given "ld a1, 0(a0)", a0 contains an address, 0 is an offset to add to the address, and a1 is the destination register where the load result is to be stored. This is a standard assembly language format for UNIX assemblers. "st a1, 0(a0)" is similar, except that a1 is the source register that will be written to the address in a1 plus the offset 0.

from riscv-asm-manual.

Can I simplely reguard puts and shutdown as placeholders of function names?That's to say I also could run other functions instead of them.Am I right?

from riscv-asm-manual.

Yes, jal (jump-and-link) can be used to call any function. j (jump) can only be used for functions that don't return like shutdown, exit, and abort.

from riscv-asm-manual.

Ok,I see.

Sir,I just have another question:
If I want to implement interrupt(like timer interrupt),must I write program by pure assembler?Is it possible that I implement interrupt by C instead of pure assembler?

In 8051 singlechip,we can implement interrupt by:

#include <reg51.h>
void in_0(void)interrupt 0 {...} //interrupt number is 0
void in_1(void)interrupt 1 {...} //interrupt number is 1
...
main() { ...}
...

So I wonder whether there is C-level interrupt program or not.

from riscv-asm-manual.

We don't have anything like that currently.

We do have a naked attribute that will give you a function with no prologue and epilogue. It would be possible to write an interrupt handler using a naked function, but you need to register the function as an interrupt handler some other way, and you would need to manually handle any tasks normally handled in the prologue and epilogue if necessary. It might be easier to do this in assembler.

from riscv-asm-manual.

Got it!

I want to try the example asm program https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md#control-and-status-registers
So here is my program:

#include "riscv_test.h"
#include "test_macros.h"

RVTEST_RV64M
RVTEST_CODE_BEGIN 

.equ RTC_BASE,      0x40000000
.equ TIMER_BASE,    0x40004000

1:      auipc   t0, %pcrel_hi(mtvec)        
        addi    t0, t0, %pcrel_lo(1b)       
        csrrw   zero, mtvec, t0

        li      t0, 8
        csrrs   zero, mstatus, t0

        li      t0, 128
        csrrs   zero, mie, t0

        li      a0, RTC_BASE
        ld      a1, 0(a0)

        li      a0, TIMER_BASE
        li      t0, 1000000000
        add     a1, a1, t0
        sd      a1, 0(a0)

loop:
        wfi
        j loop

mtvec:
        csrrc  t0, mcause, zero
        bgez t0, fail       
        slli t0, t0, 1      
        srli t0, t0, 1
        li t1, 7            
        bne t0, t1, fail
        j pass

pass:   .string "PASS\n"

fail:   .string "FAIL\n"

.section .rodata
RVTEST_CODE_END

I just slightly modified it.

And my building command and error log:

root@c:/home/chang/fpga-zynq/rocket-chip/riscv-tools/riscv-tests/isa# riscv64-unknown-elf-gcc -march=rv64g -mabi=lp64 -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -I/home/chang/fpga-zynq/rocket-chip/riscv-tools/riscv-tests/isa/../env/p -I/home/chang/fpga-zynq/rocket-chip/riscv-tools/riscv-tests/isa/macros/scalar -T/home/chang/fpga-zynq/rocket-chip/riscv-tools/riscv-tests/isa/../env/p/link.ld rv64mi/c.S -o rv64mi-p-c
/tmp/ccG2dsjM.o: In function `trap_vector':
(.text.init+0x40): undefined reference to `tohost'
collect2: error: ld returned 1 exit status

Is there syntax problem?"riscv_test.h" and "test_macros.h" are located in //home/chang/fpga-zynq/rocket-chip/riscv-tools/riscv-tests/env/p

from riscv-asm-manual.

This is a little confusing. You are referring to riscv-asm-manual, but then you are compiling code from riscv-tests.

If you look at the riscv-test files, you can see that tohost is defined by the RVTEST_DATA_START/RVTEST_DATA_END macros, which are missing from your testcase. Try looking at the other files in riscv-test to see how to write a testcase properly.

from riscv-asm-manual.

I put my own asm file(called c.S) into the riscv-tests/isa/rv64mi/ because I still don't know how to build a single asm file under another directory with specific settings : rv64ui or rv64mi,p or v .etc. Then putting it into riscv-tests/isa/rv64mi/ is an easy way now.

Yes,you're right.I had not add RVTEST_DATA_BEGIN/RVTEST_DATA_END macros.That's mentioned in the readme file of riscv-tests.

Thanks a lot!

from riscv-asm-manual.

from riscv-asm-manual.

Thank you sir,it's detailed and very useful to me!

from riscv-asm-manual.