Document immediate encoding for addi about riscv-asm-manual HOT 7 CLOSED

The assembler doesn't have typed constants. So 0x800 is 0x00000800 which is not valid for addi. RV32i has 32-bit constants, so 0xFFFFF800 is valid, and so is 0sFFFFFFFF FFFFF800. RV64i has 64-bit constants, so 0x00000000fffff800 is not valid, and 0xFFFFFFFF FFFFF800 is valid.

Another way to look at this is to try decimal constants. If someone writes "addi x0, x0, 4095" should we interpret that as "addi x0, x0, -1"? That would just be silly. Similarly, if someone writes "addi x0, x0, 0xfff" it would be wrong to treat that as -1 because 0xfff is 4095.

Another way to look at this is that humans tend to make mistakes when writing assembly language code, so we should not assume that something was intentional when it is ambiguous. 0x800 is ambiguous as it could be 2048 or -2048, so we don't accept it. 0xFFFFF800 is unambiguous for rv32i so we do accept it.

from riscv-asm-manual.

Another way to look at this is to try decimal constants. If someone writes "addi x0, x0, 4095" should we interpret that as "addi x0, x0, -1"? That would just be silly. Similarly, if someone writes "addi x0, x0, 0xfff" it would be wrong to treat that as -1 because 0xfff is 4095.

Well,

addi x0, x0, 4294965248

is interpreted as

addi x0, x0, -2048

on RV32I, and is illegal on RV64I. I think that's a bit silly too.

from riscv-asm-manual.

Perceived silliness aside, I'm not asking for any change in behavior. I'm just raising this issue to see if there is consensus around a case for documenting this behavior.

from riscv-asm-manual.

rv32 has 32-bit constants. So treating 4294965248 as -2048 is consistent with everything else.

from riscv-asm-manual.

llvm treat hexadecimal value as unsigned value. So, 0xfff is 4095 and 0xfffff800 is 4294965248. Both are out of range for addi.

from riscv-asm-manual.

I started a PR to address this then stumbled across what you just mentioned, that LLVM doesn't support this behavior. So my question really should have included, is GNU's behavior a language extension? Without an agreed-upon language spec, this is hard to answer.

from riscv-asm-manual.

You can document the subset that both GNU and LLVM toolchains accept.

from riscv-asm-manual.