Comments (1)
https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md
BTW, there is no readme.
from riscv-asm-manual.
Related Issues (20)
- Change branch from "master" to "main" HOT 1
- ELF question HOT 2
- Will the "tail" pseudo instruction always get transformed to the "jalr" instruction? HOT 9
- Pseudoinstruction examples don't work for RV64 HOT 2
- Cover more pseudoinstructions, as it was done in riscv-spec-v2.2 HOT 3
- Typos HOT 4
- how does `%hi` work for RISC-V 64? HOT 6
- Missing LICENSE file HOT 2
- Document immediate encoding for addi HOT 7
- Proposal for a common convention for synonyms for register ABI names in hand-coded assembler HOT 8
- wrong instruction generation
- `.option (no)?relax` and label differences HOT 1
- Linker relaxation ignores .option norvc HOT 6
- Compile-time rounding-mode specification in [inline] assembly HOT 1
- Z*inx should require Zicsr
- Code size reduction specification (`C`, `Zca`, `Zcd`, `Zcf` and other `Zc*` extensions) HOT 11
- manual does not mention unsigned load insn, l{b|h|w}u HOT 2
- enhancement request: please could a pdf version, or pdf frindlier version be created? HOT 2
- Two suggested improvements to the pseudo instruction table HOT 3
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from riscv-asm-manual.