Some doubts about pseudoinstruction "sw rd,symbol,rt". about riscv-asm-manual HOT 4 CLOSED

The 'rt' register is how you tell the assembler which register to use to hold the temporary value when calculating the target address.

The closest thing to skipping the 'rt' and 'storing direct' would be this: sw rd, offset(x0)

HOWEVER, the offset value only has 12 bits and therefore the target address can only refer to addresses in the first (and last) 2096 (0x800) bytes.

To express such a thing in your program you could do this:

sw		t4, %lo(val)(x0)

....
val:
.word 0

Be careful! The assembler is not going to complain if the 'val' in this example is not in the required address range. You will have to plan such things carefully.

from riscv-asm-manual.

Got it!
Actually I've seen one asm example in https://github.com/riscv/riscv-tests/tree/67500e2f200619bcd8ca3a8e5d396ea3021a7e27#test-virtual-machines :

#include "riscv_test.h"

RVTEST_RV64U        # Define TVM used by program.

# Test code region.
RVTEST_CODE_BEGIN   # Start of test code.
        lw      x2, testdata
        addi    x2, 1         # Should be 42 into $2.
        sw      x2, result    # Store result into memory overwriting 1s.
        li      x3, 42        # Desired result.
        bne     x2, x3, fail  # Fail out if doesn't match.
        RVTEST_PASS           # Signal success.
fail:
        RVTEST_FAIL
RVTEST_CODE_END     # End of test code.

# Input data section.
# This section is optional, and this data is NOT saved in the output.
.data
        .align 3
testdata:
        .dword 41

# Output data section.
RVTEST_DATA_BEGIN   # Start of test output data region.
        .align 3
result:
        .dword -1
RVTEST_DATA_END     # End of test output data region.

I was trying to build the whole asm program but gcc told me sw x2, result was illegal.I modified it to:sw x2, result,t2 and I successfully built the program.

You say "rt" will "hold the temporary value",so I wonder if any other registers which not being used in the program could replace "t2" such as a0-a7,s0-s11? Or we just could use some of t0-t6 which have not been used?

from riscv-asm-manual.

When you use the 'sw' instruction like this, it is treated as a 'pseudo instruction'. As such, it is converted into one or more actual instructions according to the rules on page 110 of the ISA manual here:

RISC-V ISA Manual

It does not mention any restrictions on the values for rt.

from riscv-asm-manual.

Oh,I finally know that there are one "basic instruction" and one "pseudo instruction" for sw.

Thanks a lot!

from riscv-asm-manual.