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KASIRGA - KIZIL Takımı Teknofest 2023 Çip Tasarımı - KIZIL İşlemci Projesi

License: GNU General Public License v3.0

Makefile 0.01% Verilog 66.55% Tcl 0.04% SystemVerilog 0.03% Assembly 32.88% C 0.33% Perl 0.01% Scala 0.01% M4 0.01% Python 0.05% Stata 0.01% HTML 0.08% JavaScript 0.01% CSS 0.01% Shell 0.01% C++ 0.01% SWIG 0.01%
clang computer-architecture llvm processor risc-v verilog rv32imc openlane rtl asic

tekno-kizil's Introduction

tekno-kizil

KASIRGA - KIZIL Takımı Teknofest 2023 Yonga Tasarımı

TEKNOFEST 2023 Çip Tasarım Yarışması Sayısal İşlemci Kategorisi Birincisi

KIZIL İşlemci Projesi

Danışman:          Prof. Dr. Oğuz Ergin

Takım Kaptanı:   Seyyid Hikmet Çelik

        Emre Hakan Demirli

        Mehmet Şakir Aslan

        Ahmet Emre Oluk

        Ege Deveci

Youtube Sunum Videosu: https://www.youtube.com/watch?v=Kw16yyKHfTI

Yarışma Sitesi: https://teknofest.org/tr/competitions/competition/121

Şartname (TR): https://cdn.teknofest.org/media/upload/userFormUpload/Teknofest_%C3%87ip_%C5%9Eartnamesi_2023_v8_paylasilan_naLIQ.pdf

Şartname (EN): https://cdn.teknofest.org/media/upload/userFormUpload/Teknofest_Chip_Specifications_2023_v5_paylasilan_kivby.pdf

İşlemci Serimi

İşlemci Özellikleri

Sistem Yapısı

Çekirdek Yapısı - Boru Hattı

CoreMark Karşılaştırma Grafiği

OPENLANE

OpenLane github dosyaları: tekno-kizil/openlane/kizil_islemci
OpenLane commiti: commit dc8e6bb151df7ee2b93d7e9d6a15abf6f224db4d (HEAD, tag: 2023.03.12)

open_pdks commiti: commit e6f9c8876da77220403014b116761b0b2d79aab4

OpenLane dosyaları zip: https://drive.google.com/drive/folders/1dEIMV9H3JBl-_G-wRf3G_0qm45DjGziY?usp=sharing

Alternatif link: https://etuedutr-my.sharepoint.com/:f:/g/personal/seyyidhikmetcelik_etu_edu_tr/En43TU66Nl1Ji5QVRtBFXAcBxOaddUdlfn2X91mqJWlFJw?e=DJrjug

tekno-kizil's People

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tekno-kizil's Issues

timer in c codes

For using more iterations in coremark-like programs, timer's upper 32 bit should also be used to see accurate results.

Döküman

Merhaba,

İşlemciyle ilgili herhangi bir makale veya başka bir döküman mevcut mu?

Teşekkürler,
Süleyman

arrangement issues

Test folders paths, makefiles and test codes arrangement should be fixed. Some file/folder paths are old and totally wrong.

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