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Apple IIe MMU and IOU custom ICs

This is a VHDL implementation of the Apple IIe's MMU and IOU custom ICs, based on the actual schematics that were used during the development of the Apple IIe.

Project status

The prototype of the IOU has been tested and is functionnal. There currently no known issue with the MMU or the IOU. More testing is needed, as well as code cleaning and more commenting. Also maybe an effort to bring the signals timings closer to the ASICs

IOU
MMU
Tested
Documentation

Tested Hardware

The implementation has been tested with these hardware components:

  • Motherboards:
    • Rev.B motherboard
    • ReActiveMicro motherboard
  • CPU:
    • Synertek 6502 (unenhanced ROMs)
    • Rockwell 6502 (unenhanced ROMs)
    • 65C02 (enhanced ROMs)
    • A recent WDC65C02 (with pins mod) (enhanced ROMs)
  • AUX Cards:
    • RAMWORKS III aux card
    • 80-Col Expansion card (820-0067-B)
    • 80-Col Expansion card (820-0067-D)
  • ROMs:
    • Enhanced ROMS from ReActiveMicro
    • Unhanced ROMS (342-0132-B, 342-0133-A, 342-0134-A, 342-0135-A)
  • Disk Interfaces
    • Apple 5.25 Drive Controller Card (655-0101-E)
    • Disk ][ Interface Card (650-X104)
  • Other
    • Mouse Interface 670-0030-C

Directory Structure

  • COMMON: Components common to the MMU and the IOU.
  • CUSTOM: Components that may need to be changed depending on the hardware used.
  • TTL: Implementation of a few TTL components used in the schematics.
  • MMU: Components that makes the MMU.
  • IOU: Components that makes the IOU.
  • Documentation: Help on understanding the IOU and MMU, and help on implementing hardware replacement adapters.
  • test: Testing components, testbenches and test-cases; has the same structure as the base directory.

License

This repository is licensed under the Creative Commons Zero License. You are free to use, modify, distribute, and build upon the code in any way you see fit. The Creative Commons License grants you the freedom to adapt the code for personal, academic, commercial, or any other purposes without seeking explicit permission.

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apple_iie_mmu_iou's Issues

RAMWORKS fails to recognize slow RAM in rows other than first.

With a RAMWORKS 1 and 3, the RAM is not recognized when using this setup:

  • 6502 with unenhanced ROMS
  • Slow RAM (4164) on a row other than the first.

Will work if a:

  • 65C02 with enhanced ROMS is used instead
    or
  • The slow RAM is replaced with faster 100ns DRAMs

[IOU] At power-on, POC and RESET_N are not valid.

At power-on, POC remains HIGH and RESET_N goes immediately High-Z.
Expected behaviour is:

  • POC should remain HIGH for ~2.4 ms, then driven LOW.
  • RESET_N should be LOW while POC is HIGH, remain LOW until the video scanner overflows (TC=1), then driven High-Z on the next PHI_1.

Problem with RAM /RAS hold time.

As of writing, this is what is displayed with a real MMU and a IOU programmed with the sources of this repository:
image

Check if there is a bus conflict on RA0-RA7.

Some game cause the Apple IIe to hang

Some games are not working when using a specific setup. Not exactly sure what could be the problem. Possibly another timing issue.
This setup works without problem:

  • 6502 with un-enhanced ROMs
  • 80-Col Expansion card (820-0067-D)
  • Apple 5.25 Drive Controller Card (655-0101-E)

But using instead a 65C02 with enhanced ROMs will cause problems with Doulbe HiRes games. For example, Aliens will hang when switching to the graphic mode.
Seems to be tied to the 80-Col card, but it's possible to re-create the problem without the card present. For example, Aliens normally can run without the 80-Col card. But will still hang without it.

Apple IIe Diagnostic v2.1 also reports problems with the 80-Col card.

Check if RA_ENABLE_N need a hold delay

The DRAM ICs used by the Apple IIe requires a hold delay on /CAS. Fortunately for the Mainboard's RAM access, the column address is valid until the falling edge of Q3, which is more than enough hold delay.
But for the AUX memory, the column address is strobed on the falling edge of Q3. This may cause a problem because, in the current implementation, that's when ORA0-7 becomes invalid.
So, there might be a race condition for the column address strobe on the AUX DRAM.
Maybe add a delay to make ORA0-7 remain valid a short time past the falling edge of Q3 would make it safer?

The Black Cauldron has some issues

The game The Black Cauldron has some weird artifact.

The 'blank' screen (before the scene is drawn on) has some artifact, but the portions that have been drawn are correct.
Here's what it looks like while the scene is being drawn:
image

On rare occasions, the game will fail to load, hanging on a loading screen. On even more rare occasion, the game will run perfectly.

Possibly linked to #39
Hopefully, not due to DRAM about to fail.

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