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c5soc_opencl's Introduction

IntelFPGA Cyclone V SoC OpenCL

Hardware Architecture

Supported Boards

Supported USB Cameras

  • UVC (USB video device class) USB Cameras,for example Logitech C270

SD Card Image Features

  • now,FPGA reconfigurable (c5soc_opencl_lxde_fpga_reconfigurable.img only)
  • IntelFPGA OpenCL SDK 17.1 ,18.0, 18.1
  • ubuntu 16.04 and 18.04 root file system
  • LXDE desktop
  • support x2go server (run desktop through ethernet)
  • also working with terasic's OpenCL hardware template BSP(x2go only with no vedio ip core,here)
  • also working without OpenCL
  • All in one ( DE1-SoC , DE10-Nano and DE10-Standard)
  • usb host and uvc driver for UVC cameras

You can downlaod the all in one SD card Image file here Baidu Cloud Link or Google Drive Link.

Run default OpenCL Application

  1. Download the Image file and write it into the microSD card
  2. Copy the BOARD_NAME_APP.rbf and BOARD_NAME_socfpga.dtb in sdcard ( make sure the BOARD_NAME same as your target board) to Windows fat32 partition and rename them to opencl.rbf and socfpga.dtb
  3. Insert the programmed microSD card to the DE10-nano or DE1-SoC or DE10-Standard board
  4. Set the MSEL[4:0] on your board to 01010 , SW10(1 to 6) on,off,on,off,on,N/A
  5. Connect a monitor to the HDMI or VGA port on baord
  6. Conect USB mouse and keyboard to the USB ports on the board
  7. Conect UART to PC (**must connect to PC or Power)
  8. Power on the board and you will see the LXDE graphical environment
  9. Open the console (Ctrl+Alt+T) on the desktop
  10. source the init_opencl_xxxx.sh file
  11. run OpenCL host (which keep same as your target board and the OpenCL SDK version ) directly.

Run another OpenCL Application

c5soc_opencl_lxde_fpga_reconfigurable.img,Here HowToReconfigureFPGA

OpenCL Hardware Template

Target Board Hardware Template wtih VIP core terasic's Hardware Template
DE1SOC de1soc_sharedonly_vga de1soc_sharedonly
DE10-nano de10_nano_sharedonly_hdmi de10_nano_sharedonly
DE10-Standard de10_standard_sharedonly_vga de10_standard_sharedonly

App

colorApp

A UVC usb camera application program is used to convert YUYV to RGB and Gray by using opencl.

Host usage:

colorApp.run -w960 -h720 
colorApp.run -w640 -h480 -r2 -g1 -b2 -u700 -d200 

camera_sobel

YUYV --> Y(gray) --> sobel

camera_sobel.run -v  //"-v" hardware mode

sobel_filter

do sobel by using four methods : arm , neon , opencl ,opencl with shared memory

Methods Frequency Time
Cortex-A9 800Mhz 168ms
Neon ? 37ms
OpenCL Memory Copy 140Mhz 256ms
OpenCL Shared Memory 140Mhz 14.8ms

Host useage:

number 1 2 3 4 5 6 different ways to run filter
"+"  Increase filter threshold
"="  Reset filter threshold to default
 " q/<enter>/<esc>" Quit the program

Mandelbrot

Host useage:

mandelbrot -w=800 -h=640 -c=32

Plans

  • add mandelbrot application
  • add to DE10-nano BSP
  • update template to Intel FPGA SDK for OpenCL 17.x
  • add DE10-Standard BSP
  • add colorGaryAPP shared memory edition
  • add camera sobel application
  • guides for building SD card image
  • Intel FPGA SDK for OpenCL 18.0 template
  • add c5soc_opencl_rte runtime environment submodule
  • add de10_nano sharedonly with i80 controller BSP for Mi-LCD

Limits

Set the CL_CONTEXT_COMPILER_MODE_INTELFPGA=3 (opencl sdk17.1 ~ 18.1) flag in environment to disable the reprogramming of the FPGA by host. For updating aocx, go to How to do fpga reconfiguration

How to do

  1. How to do

  2. How to Run x2go

  3. How to build your own BSP

  4. How to update opencl driver

  5. How to do fpga reconfiguration

  6. How to build SD card Image

c5soc_opencl's People

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Forkers

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