TDMA MAC for VANET on FPGA
TDMA MAC for VANET on FPGA
基于GPS的高精度时间信号，利用FPGA来控制RF212射频模块的数据收发，实现TDMA中时隙预约分配。
doc 所有文档
详细描述见
166.111.68.197:11123/research/vanet/MnicIaodv2016#A20160708-802.11p.2BUYVoOFco-GalileoGen2.2BTgpR.2BnOw-SPI.2BYqWVGXaEle6YmA-
已经得到解决。
长包版本（
4fb55ba
）测试中发现，TCP测试后再用ping命令，第一个包没有得到响应使得后续的延迟显示为1000ms；在修改SRAM控制模块的入口状态机前会有2000ms的延迟显示。
这是一个奇怪的问题，起因是持续发送数据会频繁的触发tx超时导致重启。逻辑分析仪发现问题为有时候TX发送中断后tx_done没有置位；或是中断入口判断tx_state（短包版本）不为“TX”状态（异常）。注：tx_state判断在长包版本中已经移到了判断FIFO中断，没有引出tx_state前发现有未知错误出现（修改完竞争问题后），引出后问题消失。
猜测是综合器优化产生的速度问题。
有时发送几秒就停下来了，但是关闭测试进程后依然可以ping通。
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