Getting started with the ULX3S is easy! You just need a Verilog source code file and the constraint file.

To program the FPGA on the ULX3S, either the commercial Lattice Diamond or Open Source tools such as yosys, nextpnr and fujprog are needed.

If you've never worked with FPGA devices, they are programmed with a hardware definition language or "HDL", that may look like a traditional programming language - however it is quite different. The "code" is really just a clever shorthand for how circuits and logic gates are connected. Verilog is one type of HDL.

You can learn more at sites such as fpga4fun, asic-world digital logic, asic-world verilog and nandland.

Once you have your circuit logic generically defined properly in a Verilog file, the hardware-specific constraint file is used to connect the inputs and outputs of the Verilog code to physical pins on the FPGA device.

Here is a collection of various ULX3S examples to get started:

• ESP 32 Blinky

• FPGA Blinky in Lattice Diamond for Windows

• FPGA Blinky using Open Source

• FPGA PassThru QuickStart

• PassThru in Lattice Diamond for Windows

• Build Open Source Toolchain yosys/nextpnr

• PassThru using Open Source

• Using Visual Micro to program the ESP32

• MicroPython on the ULX3S ESP32

• More links to RadionaOrg ULX3S examples

binaries, hardware, f32c/tools/ujprog

• https://github.com/goran-mahovlic/fpga-odysseus/tree/master/tutorials/04-Video

• https://github.com/albertxie/iverilog-tutorial/blob/master/code_samples/simple_tb.v

• https://github.com/mmicko/cross-fpga

• https://github.com/jhol/otl-modem/blob/master/fw/syn/top.v

• http://www.clifford.at/icestorm/

• Windows Subsystem for Linux (WSL): what can't I do with the Ubuntu application for Microsoft Windows?