Topic: nios2 Goto Github
Some thing interesting about nios2
Some thing interesting about nios2
nios2,Code from FPGA programming with the Altera Nios II
User: bchampp
nios2,Trivia game programmed in Assembly using NIOS II instruction set - FINISHED BETA TESTING - VERSION 1.00 RELEASED!
User: coolsday
nios2,Connect a modern, high-resolution camera to an FPGA and easily develop your applications
User: electro-logic
Home Page: https://electro-logic.blogspot.com
nios2,C / Assembly programs & library for Altera Nios II
User: fabus1184
nios2,Guitar amp sim for Altera DE1-SoC NIOS2
User: frankshc
nios2,Generic eMbedded Multiprocessor Real-Time Operating System (GeMRTOS)
Organization: g-rtos
Home Page: https://gemrtos.com
nios2,Ada-language framework
User: gabriele-galeotti
Home Page: https://sweetada.org
nios2,SoC and Embedded Linux
Organization: insper
Home Page: https://insper.github.io/Embarcados-Avancados/
nios2,A compiler for a custom made language to control robots.
User: joe-el-khoury
nios2,Hardware and software interfaces for the PS/2 keyboard/mouse protocol, for Terasic's DE1-SoC platform. Written in SystemVerilog and C.
User: jszhn
nios2,Frogger-inspired game for a Nios II architecture on Terasic's DE1-SoC platform.
User: jszhn
nios2,Simple Pong Game coded in Nios II Assembly
User: julienmalka
nios2,Hardware acceleration of image scaling
User: lazar2222
nios2,A sample design of Nios with on-board SDRAM for CYC1000 (a low cost Cyclone10 FPGA board)
User: minatsut
nios2,Design MMU for socfpga-linux 4.11. Test with Altera DE2-115.
User: montao
Home Page: https://www.youtube.com/watch?v=xyjFbuW4qkY
nios2,FPGA SOC Mario NES in SystemVerilog. Built on a DE-10 Lite FPGA, synthesized in Quartus Prime 18.1
User: nathen-smith
nios2,Detect musical notes from patterns drawn on the white paper
User: rwang97
nios2,Designing a simple processor system on FPGA. This is demo project to test FPGA DE10-Standard and develop a simpe Nios2 app.
User: sakaserbia
nios2,Transfers data from an ADC to a PC via ethernet
User: samdejong86
nios2,A Deep Neural Network-inference accelerator is created in hardware. The codes for hardware is written in System Verilog. The hardware module is interfaced with NIOS computer system, thus this hardware acts as a peripheral to the computer system. The driver code to interface the hardware is written in C. Speedup compard to software is 400 times.
User: sickranchez-c137
nios2,Please check out the attached link.
User: sickranchez-c137
Home Page: https://sickranchez-c137.github.io/NIOS-Timing/
nios2,ECE 385 Final Project -- Ethernet on MAX10 DE10-Lite FPGA and Nios II soft processor
User: timot3
nios2,Various VGA video output projects on the NIOS II processor
User: vacer25
nios2,Hardware Description Languages
User: vaddya
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