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teemuatlut avatar teemuatlut commented on July 29, 2024 1

I might entertain this idea with the TMCStepper library that will be the main focus going forward.
It might not even be too difficult to implement.

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Grogyan avatar Grogyan commented on July 29, 2024

I propose using a Serial Shift register, such the 74HC595 or 74HC164 to control the CS lines

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pgScorpio avatar pgScorpio commented on July 29, 2024

@Grogyan
A: Please explain how to use a serial shift register without using extra processor pins....
B: Why use a proprietary method while the device supports standard cascade mode ?

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Grogyan avatar Grogyan commented on July 29, 2024

The TMC2130 does not have a cascadable feature, as far as I am aware
The TMC5130 and 5160 do however have a "cascadable" feature and support a 1-wire bus.

However, using a serial shift register, is an easy method to support any SPI system to control the Chip Select pins, and both the 74HC595 and 74HC164 can be cascaded.
The 74HC164 uses one less pin than the 595, however, I prefer a separate pin to shift all the data at once.

74HC164 needs
Clock, Data, and maybe a Reset pin
You can potentially use the same SPI clock and SPI data MOSI pins as the TMC drivers, leaving one additional pin for the latching of the CS lines from the shift register.

As an additional bonus to using a shift register, you can use the same hardware SPI bus and shift register to control other SPI enabled devices, for example the MAX31855 thermocouple, which I use predominantly over thermistors on a hot end.

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pgScorpio avatar pgScorpio commented on July 29, 2024

See chapter 4.2 of the tmc2130 datasheet:
"If more than 40 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a 40-clock delay through an internal shift register. This can be used for daisy chaining multiple chips."

Concerning the use of shift registers:
Yes I know you can use shift registers as spi "io expanders", but that does not completely solve the problem of already to few pins available and it will certainly not simplify the interconnection of the tmc chips to the processor (adding an extra chip + connections)..... also I think this would have more impact on the software...

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Grogyan avatar Grogyan commented on July 29, 2024

@pgScorpio I stand corrected 👍
I somehow missed that part of the datasheet like 10 times. Lol

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