Wolv Z3 CPU is 3-stage scalar processor.

• RV32-IMCB
• Fast multiplication unit
• Slow division unit

• Harvard architecture
• Instruction and Data Tightly Integrated Memory

• UART
• Baudrate 115200
• Start Bit
• Stop Bit
• 8 Data Bits
• No Parity Bit

The installation scripts of necessary tools are located in directory tools. These scripts need root permission in order to install packages and tools for simulation and testcase generation. Please run these scripts in directory tools locally.

1. Cloning the repository:

git clone --recurse-submodules https://github.com/taneroksuz/wolv-z3.git

2. Execute scripts in directory tools to install necessary tools for compilation and simulation:

cd tools
./riscv.sh
./verilator.sh

3. Compile some benchmarks:

make compile

4. Compiled executable files are located in riscv and dumped files are located in dump. Select some executable from the directory riscv and copy them into this directory sim/input:

cp riscv/coremark.riscv sim/input/

5. Run simulation:

make simulate

6. Run simulation with debug feature:

make simulate DUMP=1

7. Run simulation with short period of time (e.g 1us, default 10ms):

make simulate MAXTIME=1000

8. The simulation results together with debug informations are located in sim/output.