This floating point unit is conform to IEEE 754-2008 standards. Supported operations are compare, min-max, conversions, addition, subtruction, multiplication, fused multiply add, square root and division in single precisions. Except square root and division all operations are pipelined.

This unit uses canonical nan (not a number) form, if it generates any nan as output. E.g. 0x7FC00000. Therefore extra conditions are added in order compare outputs with testfloat data correctly by nan generation.

Square root and division calculations are using same subunit but different path (algorithm). This subunit has a generic variable performance. For functional iterations which are fast please use 1 and fixed point iterations which are slow use 0. This unit has also own multiplier.

This floating point unit transform the single precision to the pseudo extended precision. The main benefit of this implementation is that the design needs few resources because we do not implement extension in pipeline to handle subnormal numbers. It means that all floating numbers are normalized thanks to pseudo extended precision.

The installation scripts of necessary tools are located in directory tools. These scripts need root permission in order to install packages and tools for simulation and testcase generation. Please run these scripts in directory tools locally.

To generate test cases you could use following command:

make generate

To simulate the design together with generated test cases you could run following command:

make simulate

This command requires two options for hardware description languages VERILOG and VHDL. The possible settings of these options can be found in the makefile.

Some example executions of this command look like as follows:

make simulate VERILOG=1
make simulate VHDL=1