- ๐ Hi, I am Yigit
- ๐ Iโm interested in RTL design, embedded programming and scripting
- ๐พ I mostly use Verilog and C++, sometimes Python and a little bit Bash
- ๐ซ How to reach me: [email protected] or [email protected]
- If you have a problem with your homework, please ask it to your instructor
- I don't really have time to explain stuff to strangers and it is kind a their job
- If there is an issue with one of the repositories or you want a feature to be added, please use issues
- I think it is easier to keep track and more transparent
- Or feel free to implement it yourself; much better as more people contribute!
- Also open to collaborations in interesting open source projects
- If you have a problem with your homework, please ask it to your instructor
- ๐ Also check out suoglu.github.io
suoglu / axi-gpio Goto Github PK
View Code? Open in Web Editor NEWCustom AXI GPIO core with up to 32 input and 32 output ports
License: Other