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Home Page: https://crates.io/crates/m68000
License: Mozilla Public License 2.0
Motorola 68000 interpreter, disassembler and assembler (code emitter)
Home Page: https://crates.io/crates/m68000
License: Mozilla Public License 2.0
The code that adds a 16-bit displacement to the PC fails under some circumstances, because Rust (at least in debug mode) panics if integers overflow.
I got this when I tried to execute a dbf
instruction with a negative displacement.
thread 'main' panicked at 'attempt to add with overflow', /home/vilcans/proj/m68000/src/interpreter.rs:1186:32
This was caused by the following code:
self.regs.pc = pc + disp as u32;
which causes a panic if disp
is negative.
A fix is to explicitly allow wraparound:
self.regs.pc = pc.wrapping_add(disp as u32);
I have tried searching for the string + disp
in interpreter.rs
which finds some other places that look similar and may have the same problem.
Try running the following code with cargo +nightly run
. Note that it panics. It does not panic when you run it with cargo +nightly run --release
as overflow checks are switched off in release mode.
use m68000::{MemoryAccess, M68000};
const START_ADDRESS: u32 = 0x10000;
const PROGRAM: [u16; 4] = [
0x51c8, // dbf d0,nnnn
0xfffe, // negative offset
0x4e72, // stop
0x2700,
];
struct Memory;
#[allow(unused_variables)]
impl MemoryAccess for Memory {
fn get_byte(&mut self, addr: u32) -> Option<u8> {
unimplemented!();
}
fn get_word(&mut self, addr: u32) -> Option<u16> {
PROGRAM
.get(addr.checked_sub(START_ADDRESS)? as usize / 2)
.copied()
}
fn set_byte(&mut self, addr: u32, value: u8) -> Option<()> {
unimplemented!()
}
fn set_word(&mut self, addr: u32, value: u16) -> Option<()> {
unimplemented!()
}
fn reset_instruction(&mut self) {
unimplemented!()
}
}
fn main() {
let mut memory = Memory;
let mut cpu = M68000::new_no_reset();
cpu.regs.pc = START_ADDRESS;
cpu.regs.sr = 0x2700.into();
cpu.regs.d[0] = 1; // ensure dbf tries to branch
let cycles = cpu.interpreter(&mut memory); // panics
println!("Done in {cycles} cycles");
}
Is there any plan yet to support the instructions and addressing modes used by later Motorola 68k processors?
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