FINN is an end to end framework for generating high performance FPGA hardware implementations of neural networks.

FINN can be used within a Docker container (recommended flow) or locally.

git clone <repo> cd FINN docker build . --tag=finn docker run -it finn

• Install HWGQ Caffe in the same directory as FINN: https://github.com/zhaoweicai/hwgq
• Install git lfs: https://git-lfs.github.com/
• Install numpy and google protobuf packages
  • https://www.scipy.org/install.html
  • https://github.com/google/protobuf
• Install pandas and lmdb packages
  • sudo pip install pandas lmdb

git clone <repo>

cd FINN source env.sh git lfs pull

python FINN/bin/finn --device=pynqz1 --prototxt=FINN/inputs/lfc-w1a1.prototxt --mode=estimate

python FINN/bin/finn --device=pynqz1 --prototxt=FINN/inputs/cnv-w1a1.prototxt --caffemodel=FINN/inputs/cnv-w1a1.caffemodel --mode=synth

FINN can be called in two modes, estimate and synth. "Estimate" mode reads in the prototxt of the network, constructs a hardware model of the network and scales up the hardware to optimally utilize the chosen device. This process produces a report of estimated performance and hardware utilisation. "Synth" mode performs the same actions as estimate, but additionally calls Xilinx Vivado tools to synthesize the design for the target device.

Two reference designs are included. Both have binarized weights and activations.

A multilayer perceptron, trained for MNIST digit recognition.

• prototxt = FINN/inputs/lfc-w1a1.prototxt
• caffemodel = FINN/inputs/lfc-w1a1.caffemodel

A convolutional neural network, trained for CIFAR10 image classification.

• prototxt = FINN/inputs/cnv-w1a1.prototxt
• caffemodel = FINN/inputs/cnv-w1a1.caffemodel

If you find FINN useful, please cite the FINN paper.

@inproceedings{finn,
author = {Umuroglu, Yaman and Fraser, Nicholas J. and Gambardella, Giulio and Blott, Michaela and Leong, Philip and Jahre, Magnus and Vissers, Kees},
title = {FINN: A Framework for Fast, Scalable Binarized Neural Network Inference},
booktitle = {Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays},
series = {FPGA '17},
year = {2017},
pages = {65--74},
publisher = {ACM}
}