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Simulation Leakage with different 1TnR ReRAM-based architecture
Hi:
Can you specify how to run the code with parameters? I have the following error when running the code
python SparseNet_full_activate.py 1 1
Traceback (most recent call last):
File "SparseNet_full_activate.py", line 135, in
circuit['VWL_w1_003'].dc_value=VSEL
IndexError: VWL_w1_003
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