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View Code? Open in Web Editor NEWRust crate for Flattened Devicetree parsing
License: Mozilla Public License 2.0
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blackholefox raz-b ardbiesheuvel wenyuzhao gmacd kritzefitz icodein stlankes moritz-meier jongwu tonnylyz isaacwoods metatraits property404 baoslfdt's Issues
make `FDT.find_compatible` return a itterator
(I heard someone say you would have wished you did this, but either way, add it make a new major version change)
helper function to get interupt IDs from the `interrupts-extended` property
we have interupts so why not the -extended version
Add way to pretty-print individual nodes
It'd be very nice if I could pretty-print just e.g. /chosen
No usable `Debug` impl.
The Debug impl on Fdt should print the device tree in a readable format, but it just prints all the bytes. I will contribute a fix, look out for a PR in the next few hours.
Panic in `find_all_nodes()`
fdt.find_all_nodes("uart") panics on unwrap: in fdt-0.1.0/src/lib.rs' at line 290, presumably on the line let parent_path = match path_split.next().unwrap(). Not awake enough to dig into why. (Edit: This is using version 0.1.0)
Input device tree:
/dts-v1/;
/ {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "riscv-virtio";
model = "riscv-virtio,qemu";
chosen {
bootargs = [00];
stdout-path = "/soc/uart@10000000";
};
memory@80000000 {
device_type = "memory";
reg = <0x00 0x80000000 0x00 0x8000000>;
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
timebase-frequency = <0x989680>;
cpu@0 {
phandle = <0x07>;
device_type = "cpu";
reg = <0x00>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
interrupt-controller {
#interrupt-cells = <0x01>;
interrupt-controller;
compatible = "riscv,cpu-intc";
phandle = <0x08>;
};
};
cpu@1 {
phandle = <0x05>;
device_type = "cpu";
reg = <0x01>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
interrupt-controller {
#interrupt-cells = <0x01>;
interrupt-controller;
compatible = "riscv,cpu-intc";
phandle = <0x06>;
};
};
cpu@2 {
phandle = <0x03>;
device_type = "cpu";
reg = <0x02>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
interrupt-controller {
#interrupt-cells = <0x01>;
interrupt-controller;
compatible = "riscv,cpu-intc";
phandle = <0x04>;
};
};
cpu@3 {
phandle = <0x01>;
device_type = "cpu";
reg = <0x03>;
status = "okay";
compatible = "riscv";
riscv,isa = "rv64imafdcsu";
mmu-type = "riscv,sv48";
interrupt-controller {
#interrupt-cells = <0x01>;
interrupt-controller;
compatible = "riscv,cpu-intc";
phandle = <0x02>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <0x07>;
};
core1 {
cpu = <0x05>;
};
core2 {
cpu = <0x03>;
};
core3 {
cpu = <0x01>;
};
};
};
};
soc {
#address-cells = <0x02>;
#size-cells = <0x02>;
compatible = "simple-bus";
ranges;
flash@20000000 {
bank-width = <0x04>;
reg = <0x00 0x20000000 0x00 0x2000000 0x00 0x22000000 0x00 0x2000000>;
compatible = "cfi-flash";
};
rtc@101000 {
interrupts = <0x0b>;
interrupt-parent = <0x09>;
reg = <0x00 0x101000 0x00 0x1000>;
compatible = "google,goldfish-rtc";
};
uart@10000000 {
interrupts = <0x0a>;
interrupt-parent = <0x09>;
clock-frequency = <0x384000>;
reg = <0x00 0x10000000 0x00 0x100>;
compatible = "ns16550a";
};
poweroff {
value = <0x5555>;
offset = <0x00>;
regmap = <0x0a>;
compatible = "syscon-poweroff";
};
reboot {
value = <0x7777>;
offset = <0x00>;
regmap = <0x0a>;
compatible = "syscon-reboot";
};
test@100000 {
phandle = <0x0a>;
reg = <0x00 0x100000 0x00 0x1000>;
compatible = "sifive,test1\0sifive,test0\0syscon";
};
pci@30000000 {
interrupt-map-mask = <0x1800 0x00 0x00 0x07>;
interrupt-map = <0x00 0x00 0x00 0x01 0x09 0x20 0x00 0x00 0x00 0x02 0x09 0x21 0x00 0x00 0x00 0x03 0x09 0x22 0x00 0x00 0x00 0x04 0x09 0x23 0x800 0x00 0x00 0x01 0x09 0x21 0x800 0x00 0x00 0x02 0x09 0x22 0x800 0x00 0x00 0x03 0x09 0x23 0x800 0x00 0x00 0x04 0x09 0x20 0x1000 0x00 0x00 0x01 0x09 0x22 0x1000 0x00 0x00 0x02 0x09 0x23 0x1000 0x00 0x00 0x03 0x09 0x20 0x1000 0x00 0x00 0x04 0x09 0x21 0x1800 0x00 0x00 0x01 0x09 0x23 0x1800 0x00 0x00 0x02 0x09 0x20 0x1800 0x00 0x00 0x03 0x09 0x21 0x1800 0x00 0x00 0x04 0x09 0x22>;
ranges = <0x1000000 0x00 0x00 0x00 0x3000000 0x00 0x10000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000>;
reg = <0x00 0x30000000 0x00 0x10000000>;
dma-coherent;
bus-range = <0x00 0xff>;
linux,pci-domain = <0x00>;
device_type = "pci";
compatible = "pci-host-ecam-generic";
#size-cells = <0x02>;
#interrupt-cells = <0x01>;
#address-cells = <0x03>;
};
virtio_mmio@10008000 {
interrupts = <0x08>;
interrupt-parent = <0x09>;
reg = <0x00 0x10008000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10007000 {
interrupts = <0x07>;
interrupt-parent = <0x09>;
reg = <0x00 0x10007000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10006000 {
interrupts = <0x06>;
interrupt-parent = <0x09>;
reg = <0x00 0x10006000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10005000 {
interrupts = <0x05>;
interrupt-parent = <0x09>;
reg = <0x00 0x10005000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10004000 {
interrupts = <0x04>;
interrupt-parent = <0x09>;
reg = <0x00 0x10004000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10003000 {
interrupts = <0x03>;
interrupt-parent = <0x09>;
reg = <0x00 0x10003000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10002000 {
interrupts = <0x02>;
interrupt-parent = <0x09>;
reg = <0x00 0x10002000 0x00 0x1000>;
compatible = "virtio,mmio";
};
virtio_mmio@10001000 {
interrupts = <0x01>;
interrupt-parent = <0x09>;
reg = <0x00 0x10001000 0x00 0x1000>;
compatible = "virtio,mmio";
};
plic@c000000 {
phandle = <0x09>;
riscv,ndev = <0x35>;
reg = <0x00 0xc000000 0x00 0x210000>;
interrupts-extended = <0x08 0x0b 0x08 0x09 0x06 0x0b 0x06 0x09 0x04 0x0b 0x04 0x09 0x02 0x0b 0x02 0x09>;
interrupt-controller;
compatible = "riscv,plic0";
#interrupt-cells = <0x01>;
#address-cells = <0x00>;
};
clint@2000000 {
interrupts-extended = <0x08 0x03 0x08 0x07 0x06 0x03 0x06 0x07 0x04 0x03 0x04 0x07 0x02 0x03 0x02 0x07>;
reg = <0x00 0x2000000 0x00 0x10000>;
compatible = "riscv,clint0";
};
};
};
`FdtNode::interrupts()` can not handle ARM interrupt properties
On ARM, #interrupt-cells property value is usually 3:
https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic.txt.
This common case is not handled by the current method implementation:
Lines 256 to 260 in 0c2fb5b
Also, interpreting the #interrupt-cells = <2> case as a single u64 interrupt number does not seem correct either,
because the Linux kernel docs say that those two cells encode entirely different things:
b) two cells
------------
The #interrupt-cells property is set to 2 and the first cell defines the
index of the interrupt within the controller, while the second cell is used
to specify any of the following flags:
Source: https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
To handle all variants of interrupts correctly, this method should probably return an iterator over a custom Interrupt type,
just like FdtNode::reg() returns an iterator over MemoryRegion items.
Remove `unwrap`'s/`expect`'s in favor of propagating up errors
I think it would be nice to get rid of some of these panics in favor of propagating up errors
expose chosen node to public use
Hello I'm new here and do some development based on this project.
I want to carry some self-defined info inside chosen, like store kernel info inside chosen node. But I get that, chosen node is private and can't be used outside. So, I wonder if it is likely to expose chosen as public or can I add self-defined chosen releated interface to this repo?
panic in fdt-0.1.1/src/standard_nodes.rs line 188
Same device tree as #3, appears to happen on the first node returned by Fdt::all_nodes().
Pretty-print using the `Display` implementation instead of `Debug`
To me, the Display trait seems more appropriate for pretty printing. Is there any reason Debug is used for this purpose?
expowose de owiginaw powointew
uwu pwease add a functnya that expowoses de owiginaw powointew uwu :3
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