Table of Contents

• RF Signal Integrity to Power Integrity
• about SEPIA
• about QSPICE
• about PyQSPICE
• about SEPIA@QSPICE
• Basic Operation
• Usage / Example
• Sub-Circuit Parameters
• Usage from PyQSPICE

Please visit and review the SEPIA article in the RF Signal Integrity to Power Integirity, a series article-on the Microwave Journal, for the technical details.

SEPIA: Stability Evaluation for Power Integrity Analysis

The [SEPIA] is a control loop stability analysis tool developed by Mr. Steve Sandler at Picotest.com.

The SEPIA extracts frequency-domain parameters of our target circuit/loop, directly from time-domain, transient (.TRAN) simulations.

The SEPIA method is based on a simple fact that every single circuit sharing the same qualify factor Q exhibits the mathematically "similar" ringing to decay shape by assuming it is a quadratic system.

Copyright © 2014 Picotest

The "SEPIA" compiled binary, the DLL (Windows Dynamic Link Library) file, available from this repository is a copyright intellectual property of Picotest.com. All rights reserved.

Please contact [email protected] for more information.

In this repository, by a courtesy of Mr. Steve Sandler, the SEPIA is implemented into the QSPICE.

The QSPICE is a variant of SPICE (Simulation Program with Integrated Circuit Emphasis, i.e. analog circuit simulator) software offered by Qorvo, that is available at no cost.

The PyQSPICE is a Python wrapper-module for the QSPICE, available from this Qorvo repository on GitHub. By using the QSPICE as a strong back-end simulator, it supports complex data processing and data plotting.

The QSPICE supports user-defined C++ and/or Verilog circuit blocks. The SEPIA processing routines are implemented as one of such user-defined circuit blocks, that is the DLL binary available here.

At a high-level, the SEPIA@QSPICE circuit module operates in following steps.

1. As a transient simulation goes, it detects ringing peaks and record them in its internal memory.
2. At the end of the transient simulation, it extracts the control loop parameters based on the SEPIA routines.
   2a. It extracts basic loop information: Q and frequency
   2b. It model-fits and generates simplified RLC circuit model(s) representing the target loop, if options specified.
3. When specified by options, it further runs extra/follow-up simulations to RLC models.

The basic usage of the SEPIA@QSPICE and examples are summarized in this session file by utilizing the Jupyter Lab environment.

The SEPIA@QSPICE module takes four (4) sub-circuit parameters and all parameters are explained in this manual.

When using SEPIA@QSPICE from a PyQSPICE environment, we can use a PyQSPICE method to control the SEPIA@QSPICE options described in this manual.