Comments (1)
It looks like the error was caused by the v4.216
of verilator
. I could not compile the specified verilator
in the Makefile
; therefore, I manually installed the verilator (v4.216)
instead. Downgrading the version to v4.214
(same as the one used in Ara) fixed the issue.
from ara.
Related Issues (20)
- The tail element does not follow the RVV SPEC requirements.
- About CVA 6 integrated with vector unit HOT 1
- RISC-V tests failing HOT 3
- invalid arch name error HOT 1
- Executing hello_world Program on Vector Unit and generating it's trace file HOT 2
- similar to #224 HOT 1
- Failed in RTL Simulation HOT 24
- Failed in RTL Simulation HOT 1
- Failed to execute Ideal Dispatcher mode HOT 2
- Similar issue as #320 HOT 2
- Non-Compiler based test environment HOT 1
- cva6 with ara on genesys
- Power Consumption for all the benchmarks HOT 1
- Question of vwadd instruction HOT 1
- yaml.h
- riscv-isa-sim
- uint64_t HOT 2
- half-precision floating point example code HOT 1
- ARA Synthesis using Cadence or Synopsys Tools HOT 1
- Any User Specific C program on ARA HOT 2
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from ara.