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algorithms

A collection of algorithms and data structures

algorithms-and-data-structures

A collection of classical data structures and algorithms implemented in Typescript with video lectures

awesome-courses

:books: List of awesome university courses for learning Computer Science!

catalogue

concurrentqueue

A fast multi-producer, multi-consumer lock-free concurrent queue for C++11

cpp_concurrency_masterclass

Code for C++ concurrency course in Udemy

dataflowgraph-modeling-for-logic-circuits

This project is about designing and generating synthesizable high level state machine description from the Data flow graph in Verilog while providing scheduling alternatives like LIST_L and LIST_R using modeling Paradigm. The user can construct Data flow graph (for ex data flow graph for 6th order FIR filter) using Atoms. Atoms can be logical operators such as adder, subtractor and multipliers etc. Atoms act as graph nodes and the edges can be used to define the relationship between them in the Data flow graph.

dlsdk

dlxos-dynamic-one-level-and-two-level-paging

The goal of this project is to extend DLXOS memory management subsystem to support dynamic one-level page paging, dynamic two-level paging

ecb-and-cbc-mode-of-aes

This project implements Electronic Codebook and popular Cipher block chaining algorithms. It also profiles the code for differnt input sizes to demonstarte the merits and demerits of both algorithms

hlsm-verilog-code-generation-from-c-file

In this project, we will design and implement a high-level synthesis tool capable of creating a synthesizable high-level state machine (HLSM) description in Verilog from a C-like sequential program supporting conditional and loop constructs while providing various scheduling alternatives.

interview

Implementation of programming question asked during Phone Screening Interview

leetcode

Complete solutions to Leetcode problems; updated daily. Subscribe to our YouTube channel for more.

leetcode-patterns

A curated list of 170+ leetcode questions grouped by their common patterns

machine-learning-systems-design

A booklet on machine learning systems design with exercises

maxas

Assembler for NVIDIA Maxwell architecture

merge-spmv

mkl-dnn

Intel(R) Math Kernel Library for Deep Neural Networks (Intel(R) MKL-DNN)

mlir

"Multi-Level Intermediate Representation" Compiler Infrastructure

models

Model Zoo for Intel® Architecture: contains Intel optimizations for running deep learning workloads on Intel® Xeon® Scalable processors

mpi_profiler

The project is based on building MPI profiler which can intercept all the MPI Calls from a client C code by overriding the existing MPI library calls using an opensource wrapper generator and depict the data flow as a graph along with the computation, communication latencies and critical path across the processes.

multilevel-priority-based-feedback-scheduling-algorithm-for-dlxos

Implemented Multilevel Feedback Queue Scheduling used by BSD UNIX in to DLXOS and also the project scope involves implementing the system call in to DLXOS which returns the PID of the process upon the execution of system call

neon

Intel® Nervana™ reference deep learning framework committed to best performance on all hardware

ngraph

nGraph - open source C++ library, compiler and runtime for Deep Learning

ngraph-neon

neon - nGraph integration

ngraph-python

Original Python version of Intel® Nervana™ Graph

notes

my dev notes

operating-systems

Georgia Tech OMSCS Operating Systems

percolation

This project uses quick union algorithm to implement monte carlo simulation to solve Percolation

system-design-primer

Learn how to design large-scale systems. Prep for the system design interview. Includes Anki flashcards.