peteut / migen Goto Github PK

Replication broken

• architecture.mako#L94
• architecture.mako#L64
• architecture.mako#L70
• architecture.mako#L85
• architecture.mako#L54
• case.mako
• entity.mako#L5
• if.mako

• do not generate ClockDomain cd_write and cd_read, but use getattr(self.sync, idomain) as in PulseSynchronizer
• use ResetSignal(idomain)

Rebase and fix 44a55af and create a pull request.

See also migen.fhdl.verilog._list_comb_wires for concurrent assignments.

• buffer signal for outputs if used within f.specials
• _buffer_variables shall return comb output signals
• _wires shall return comb specials input signals

Add Modelsim support, a VPI tutorial can be found here.
Refer to ModelSim's UM, Appendix D for further instructions.

The VPI plugin should not be installed globally (so no sudo is required). Set -M option of vvp to specify the directory where the module resided.

Consider IP reuse from PoC.

Test all examples by running them using subprocess.check_call.

Add code coverage, use coveralls.