lfx-mentorship's People
lfx-mentorship's Issues
Results Awaited
Dear Mentors,
I have submitted both tasks. When will the selection results be announced?
Task 1 Example
"Example: for RV32IM, two relevant coverpoints are to check whether the bit at index 12 of misa is 0 and 1(misa && 0x1000 == 0x1000)."
In this, if RV32IM is the input string, the output that we should get is:
misa && 0x100 == 0x100
misa && 0x1000 == 0x1000
One coverpoint each for I and M.
Right? Please correct me if I am missing something.
Could you also elaborate on
"Briefly describe the events (i.e list out the possible exceptions and why) in the test which will occur while testing one such coverpoint."
Thank you.
RISC-V ISA string(described in Chapter 28 of the RISC-V specification(unpriv))
Chapter 28 is History and Acknowledgements. I think you meant Chapter 27 - ISA Extension Naming Conventions. Please confirm. Thank you.
Task 2
Please explain what we have to do in this task. We have to write a RISC-V assembly code? But how will it include the coverpoints since we are simply giving the string like "RV32IM"?
Thank You.
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