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corev-llvm-project's Issues

cv-simd-shufflei1-sci-b-compile-1.c

What is the version of XCV extensions implemented here?

Currently all upstreamed LLVM work states that the version of xcv extension is 1.3.1 as it is the newest version at time of upstreaming. However, there is a slight issue with it.

https://github.com/riscv-non-isa/riscv-toolchain-conventions/blob/master/README.mkd#list-of-vendor-extensions
In the list above it states that the version is 1.0.0, and this also reflects on recent pr in GNU toolchain openhwgroup/corev-binutils-gdb@9b12078
So should we use 1.0.0 in LLVM to remain consistency?

Assembler implementation status compared to GCC

This python3 script translates tests from https://github.com/openhwgroup/corev-binutils-gdb/tree/development/gas/testsuite/gas/riscv to llvm-lit compatible tests so that we can compare the implementation of the two.

script

from pathlib import Path
import fileinput
import re

out_path = '/home/melonedo/corev-llvm-project/llvm/test/MC/RISCV/corev/gcc-crosscheck'
gcc_test_path = '/home/melonedo/corev-binutils-gdb/gas/testsuite/gas/riscv/'

def process_asm(asm_file):
    res = []
    start = False
    with fileinput.input(asm_file) as f:
        for line in f:
            if not start:
                start = re.fullmatch(r'\w+:\s*', line) is not None
                continue
            if re.fullmatch(r'\s*(?:#.+)?\n?', line) is not None:
                continue
            m = re.match(r'^\s*(cv\.[\w\d.]+)\s*(.+)$', line)
            if m is None:
                print(asm_file, line)
            else:
                res.append((m[1], m[2]))
    if not res:
        print(asm_file)
    assert res
    return res

def process_dis(dis_file):
    res = []
    start = False
    with fileinput.input(dis_file) as f:
        for line in f:
            if not start:
                start = re.fullmatch(r'0\+000 <\w+>:\n', line) is not None
                # print(line, start)
                continue
            if re.fullmatch(r'\s+', line) is not None:
                continue
            m = re.match(r'^\s*(?:\[\s*\]\+)?[a-f\d]+:\s*(?:\[\s*\]\+)?([\da-f]{8})\s*(?:\[\s*\]\+)?([\w\d.]+)\s*(?:\[\s*\]\+)?(.+?)\s*(?:#.+)?$', line)
            # m = re.match(r'^\s*(?:\[\s*\]\+)?[a-f\d]+:\s*(?:\[\s*\]\+)?([\da-f]{8}).+$', line)
            if m is None:
                print(dis_file, line)
            else:
                res.append(m[1])
    if not res:
        print(dis_file)
    assert res
    return res

prologue = """\
# RUN: llvm-mc -triple=riscv32 --mattr=+xcorev -show-encoding %s \\
# RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING

"""

def write_test(out, asm, dis):
    print(out)
    with open(out, 'wt') as f:
        f.write(prologue)
        for a, d in zip(asm, dis):
            f.write(f"{a[0]} {a[1]}\n")
            # f.write(f"# CHECK-INSTR: {a[0]} {a[1]}\n")
            f.write(f"# CHECK-ENCODING: [0x{d[6:8]},0x{d[4:6]},0x{d[2:4]},0x{d[0:2]}]\n")
            f.write('\n')

def main():
    for dis_file in sorted(Path(gcc_test_path).glob('cv-*.d')):
        if re.search(r'fail', dis_file.name) is not None:
            # if 'fail' not in dis_file.name:
            #     print('skip:', dis_file)
            continue
        asm_file = dis_file.with_name(dis_file.name.replace('.d', '.s'))
        assert asm_file.is_file()
        assert dis_file.is_file()
        asm = process_asm(asm_file)
        dis = process_dis(dis_file)
        assert len(asm) == len(dis)
        out = Path(out_path) / asm_file.name
        write_test(out, asm, dis)

def clean():
    out = Path(out_path)
    if not out.is_dir():
        out.mkdir()
    for f in out.iterdir():
        f.unlink()

clean()
main()

Status

~~There are 342 tests in total from GCC, among which 33 of them succeed, and 309 tests fail as when comparing 42704e0 to openhwgroup/corev-binutils-gdb@5510890.~~

See summary of updates in comments.

Tagging the remaining patches

This issue is used merely to map the tags added to the recent git history in order to classify the commits as belonging to one patch for upstream or the other.

Here you can find the list that is being updated: https://docs.google.com/spreadsheets/d/1vm-lTTcIdAxcIfH-43mUuQeG4r-r0QGWTnufU-MqMWM/edit?usp=sharing

Every record needs to have name of the tag in the form "extension"-[intrinsics, builtins].x.y with x and y defining the order in which these patches need to be picked.

Replace the tags in CORE-V commits with `[RISCV]`

Various different tags have been used in CORE-V commits. For consistency all CORE-V commits should use exactly one of the same tag and should use the same tag as would be used upstream in our circumstances. In upstream it is typical to use the [RISCV] tag for this purpose so I would suggest it is appropriate to use this tag instead. This change will make it easier to upstream from the COREV staging post. This change will require a history rewrite for the repository.

e.g. a commit called
[COREV] Replace the tags in CORE-V commits with RISCV
would be replaced by a commit called
[RISCV] Replace the tags in CORE-V commits with RISCV

Xcvmem incompatibilities with the GCC tests

Just opening this issue to keep track of the test incompatibilities in the closed PR #89
Once it's confirmed they are all solved I'll close this issue.

Mac instruction error

decoding conflict
Decoding Conflict:
00...............101.....1011011
.................101.....1011011
.........................1011011
................................
CV_MULUN 00_______________101_____1011011
CV_MULURN 00_______________101_____1011011
Decoding Conflict:
01...............101.....1011011
.................101.....1011011
.........................1011011
................................
CV_MULHHUN 01_______________101_____1011011
CV_MULHHURN 01_______________101_____1011011
https://github.com/openhwgroup/corev-llvm-project/actions/runs/4341096331/jobs/7580286236
testcase MC/RISCV/corev/mac-all-extensions.s fail.

upstream

MC patchs:

llvm intrinsic:

Verify CORE-V MC layer tests check disassembler

I noticed as an example that simd-all-extensions.s checks for the disassembly of instructions when llvm-objdump doesn't have various extensions enabled, but not when it is enabled. I'm not sure whether its covered by other tests, but these tests probably should also check the disassembler works with the extension enabled, either by adding adding a .arch in the file, explicit options to llvm-objdump or mapping symbols if you want to be more dynamic.

Update: It looks like pull request #35 might get rid of a lot of this, but something to review in tests before preparing upstream.

CORE-V Hardware Loop Codegen Issues

This issue should summarize all problems I ran into when playing around with xcvhwlp using Core-V LLVM for compiling and Core-V RISC-V GCC for linking.

Codegen implements behavior of original PULP Hardware Loop and is therefore not compatible with recent CV32E40P RTL changes such as 14716209ec6d09ad2d31af4a5c36a094a65d767f. (HWLP End now points to the first instruction after the body)
Workaround: Use old version of RTL.
Compressed Instructions are not disabled for HWLP Body leading to Illegal Instruction Exceptions.
Workaround: Compile for just RV32IM_XCVHWLP
HWLP Body may contain calls to libc such as memset or memcpy resulting in disallowed unconditional jump.
Workaround: Use -ffreestanding or -fno-builtin (often not an option)
Similarly, calls to math library functions such as __udivdi3 may be emitted by the compiler. (Probably also affecting softfloat library)
Workaround: -
Compiler legalization of unsupported LLVM-IR operations such as @llvm.smax, @llvm.umin,… will expand these into a sequence of supported RISC-V instructions including conditional branches.
Workaround: Enable XCVALU which has implementations for CV_MAX,…
Same problem as above but no trivial fix available i.e. when having a 64Bit SRA (artithmetic shift right) in the loop body which requires custom expansion.
Workaround: -

How to check COREV_CLUSTER for Event Load Instruction

Event Load Instruction
The event load instruction cv.elw is only supported if the COREV_CLUSTER parameter is set to 1.

But how does the compiler detect the COREV_CLUSTER parameter.
or
The compiler does not require special checking and the user controls whether this extension is enabled or not？

ref:
https://github.com/openhwgroup/cv32e40p/blob/master/docs/source/instruction_set_extensions.rst#event-load-instruction

Update naming for xcvmem instructions

Same as issues openhwgroup/corev-binutils-gdb#101 and openhwgroup/corev-gcc#60

Please update the post-inc xcvmem instructions to match the agreed spec.

Post-* cv.lw rd, (rs1), +/-imm/rs2

Naming of cv.slet

Make the change: openhwgroup/cv32e40p#833

I suggest:

Rename cv.slet to cv.sle.
Change cv.slet to an instruction alias for cv.sle.
Repeat for cv.sletu -> cv.sleu.

Similar issues: openhwgroup/corev-binutils-gdb#100

Builtins Implementation Status compared to GCC

Here hosts the generated result of trying to compile gcc's builtins test suite on LLVM clang

Script

import os
import re
import subprocess

LLVM_PATH = "~/llvm-project/llvm/cmake-build-debug/bin"
GNU_TEST_PATH = "~/corev-gcc/gcc/testsuite/gcc.target/riscv"

def test_output(dg_final_line, output):
  # Extract the regular expression and expected count from the dg-final line
  match = re.search(r'scan-assembler-times "([^"]*)" (\d+)', dg_final_line)

  if match:
      pattern = match.group(1).replace("\\\\.", re.escape(".")).replace("\\(", "(").replace("\\)", ")").replace("\\[", "[") \
          .replace("\\]", "]").replace("\\?", "?").replace("\\:", ":").replace("\\|", "|").replace(",", ", ") \
          .replace('(?:.L[0-9])', '(?:.L[A-z0-9_]*)').replace('(?:.L[0-9]+)', '(?:.L[A-z0-9_]*)')
      expected_count = int(match.group(2))

      # Count the occurrences of the pattern in the output
      occurrences = len(re.findall(pattern, output))

      # Check if the occurrences match the expected count
      if occurrences == expected_count:
          return True, pattern, occurrences
      else:
          return False, pattern, occurrences
  else:
      return False, None, None


# walk through gnu tests
for root, dirs, files in os.walk(GNU_TEST_PATH):
  for file in files:
      if "cv-" in file and "fail" not in file:
          # get the builtin name
          with open(os.path.join(root, file)) as f:
              builtins = []
              tests = []
              for line in f.readlines():
                  if "__builtin_" in line:
                      builtin = re.match(r".*__builtin_(\w+).*", line).group(1)
                      if builtin not in builtins:
                          builtins.append(builtin)
                  if "dg-final" in line:
                      tests.append(line)

              # run the test
              if "cv-interrupt-all-f-" in file:
                  process = (f"{LLVM_PATH}/clang -target riscv32-unknown-linux-gnu -S -march=rv32if -mabi=ilp32f {os.path.join(root, file)} -o - ")
              else:
                  process = (f"{LLVM_PATH}/clang -target riscv32-unknown-linux-gnu "
                             f"-S -march=rv32if_xcvelw1p0_xcvmac1p0_xcvbitmanip1p0_xcvsimd1p0_xcvalu1p0 -mabi=ilp32f "
                             f"{os.path.join(root, file)} -o - ")
              result = 0
              try:
                  output = subprocess.check_output(process, shell=True, stderr=subprocess.STDOUT)
              except subprocess.CalledProcessError as e:
                  output = e.output
                  result = e.returncode
              stdout = output.decode("utf-8")
              # print("### " + file)
              if result != 0:
                  failed_builtins = []
                  for line in stdout.split("\n"):
                      if "__builtin_" in line:
                          builtin = re.match(r".*__builtin_(\w+).*", line).group(1)
                          if builtin not in failed_builtins:
                              failed_builtins.append(builtin)
                  print(f"- [ ] {file}")
                  for failed_builtin in failed_builtins:
                      print(f"  - {failed_builtin}")
              else:
                  failed_builtins = []
                  for test in tests:
                      passed, pattern, occurrences = test_output(line, stdout)
                      if not passed:
                          failed_builtins.append(pattern)
                  if len(failed_builtins) == 0:
                      print(f"- [x] {file}")
                  else:
                      print(f"- [ ] {file}")
                      for failed_builtin in failed_builtins:
                          print(f"  - {failed_builtin}")

Oct. 17 2023: Updated a run with commit bd44b26 and openhwgroup/corev-gcc@276b330
Aug. 25 2023: Updated a run with #75 and #77
Aug. 28 2023: Updated a run on openhwgroup/corev-gcc@613923e
Dec. 28 2023: Updated a run on e93f95c

CORE-V: expand xcorev target feature to the extensions it enables

When specifying the -target-feature=+xcorev it implies that all implemented CORE-V extensions are enabled. This should be reflected in the Arch-string. So

-march=rv32i_xcorev

should expand to

-march=rv32i2p0_xcorevhwlp2p0_xcorevmac2p0_xcorevmem2p0_xcorevalu2p0

(not sure about the versions that should be used for the extensions)

We are using LLVM's default "do not open pull request" option

I tried opening a PR, and got as part of the PR message


# **DO NOT FILE A PULL REQUEST**

This repository does not accept pull requests. Please follow http://llvm.org/docs/Contributing.html#how-to-submit-a-patch for contribution to LLVM.

# **DO NOT FILE A PULL REQUEST**

We should drop the .github file that adds that for us.

Update references to `xcorev` in CORE-V march strings with references to `xcv`

Recently the decision was made to shorten xcorev as it appears in march strings to xcv. Despite this, the compiler still expects the former. This must be resolved. This will require changes to be made both within the compiler internals and within the test cases. Any and all references to the old march strings must be changed, and that includes the feature extensions in the compiler internals. I am aware that steps are being taken to change this for simd however this will have to be done for all CORE-V march strings.

I will use simd as an example here as this change is already in progress: In general I suggest changing, for example, xcorevsimd to xcvsimd and also changing, for example, FeatureExtXCoreVSIMD to FeatureExtXcvsimd to reflect the extension naming scheme.

LLVM: plans to update the repository

I'm from PLCT Lab and am currently trying to port a patch regarding RISC-V Zce extension support onto the repo, but found that this repository is quite outdated compared to upstream. Are there any plans to merge some of the changes?

CORE-V C API Specification

Is this defined? See the comment at https://reviews.llvm.org/D157510#4573494

Immediate Branching related compiler crash

I ran into segfaults trying to use the xcvbi extension on various benchmarks including tacle-bench. Here is the crash dump:

llc ./dijkstra.ll -mattr=+m,+xcvbi -O3 -mtriple=riscv32
Unknown condition code!
UNREACHABLE executed at /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:782!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /var/tmp/ga87puy/hwlp/install/llvm2/bin/llc ./dijkstra.ll -mattr=+m,+xcvbi -O3 -mtriple=riscv32
1.      Running pass 'Function Pass Manager' on module './dijkstra.ll'.
2.      Running pass 'Control Flow Optimizer' on function '@dijkstra_main'
 #0 0x0000557b04bd5bc2 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Support/Unix/Signals.inc:569:22
 #1 0x0000557b04bd5c7d PrintStackTraceSignalHandler(void*) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Support/Unix/Signals.inc:636:1
 #2 0x0000557b04bd3888 llvm::sys::RunSignalHandlers() /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Support/Signals.cpp:104:20
 #3 0x0000557b04bd54fa SignalHandler(int) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Support/Unix/Signals.inc:407:1
 #4 0x00007fa9607b0420 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x14420)
 #5 0x00007fa9601a400b raise /build/glibc-SzIz7B/glibc-2.31/signal/../sysdeps/unix/sysv/linux/raise.c:51:1
 #6 0x00007fa960183859 abort /build/glibc-SzIz7B/glibc-2.31/stdlib/abort.c:81:7
 #7 0x0000557b04afe42b bindingsErrorHandler(void*, char const*, bool) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Support/ErrorHandling.cpp:221:55
 #8 0x0000557b030d73e9 llvm::RISCVInstrInfo::getBrCond(llvm::RISCVCC::CondCode, bool) const /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:784:33
 #9 0x0000557b030d7e50 llvm::RISCVInstrInfo::insertBranch(llvm::MachineBasicBlock&, llvm::MachineBasicBlock*, llvm::MachineBasicBlock*, llvm::ArrayRef<llvm::MachineOperand>, llvm::DebugLoc const&, int*) const /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:947:76
#10 0x0000557b03e28bb9 llvm::BranchFolder::OptimizeBlock(llvm::MachineBasicBlock*) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/CodeGen/BranchFolding.cpp:1446:24
#11 0x0000557b03e277ea llvm::BranchFolder::OptimizeBranches(llvm::MachineFunction&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/CodeGen/BranchFolding.cpp:1207:16
#12 0x0000557b03e22b9e llvm::BranchFolder::OptimizeFunction(llvm::MachineFunction&, llvm::TargetInstrInfo const*, llvm::TargetRegisterInfo const*, llvm::MachineLoopInfo*, bool) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/CodeGen/BranchFolding.cpp:212:31
#13 0x0000557b03e225f8 (anonymous namespace)::BranchFolderPass::runOnMachineFunction(llvm::MachineFunction&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/CodeGen/BranchFolding.cpp:137:33
#14 0x0000557b039a2954 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/CodeGen/MachineFunctionPass.cpp:91:33
#15 0x0000557b040d39c4 llvm::FPPassManager::runOnFunction(llvm::Function&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1430:20
#16 0x0000557b040d3c8d llvm::FPPassManager::runOnModule(llvm::Module&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1476:13
#17 0x0000557b040d40ff (anonymous namespace)::MPPassManager::runOnModule(llvm::Module&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1545:20
#18 0x0000557b040cf020 llvm::legacy::PassManagerImpl::run(llvm::Module&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/IR/LegacyPassManager.cpp:535:13
#19 0x0000557b040d49d5 llvm::legacy::PassManager::run(llvm::Module&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/lib/IR/LegacyPassManager.cpp:1673:1
#20 0x0000557b03004f3e compileModule(char**, llvm::LLVMContext&) /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/tools/llc/llc.cpp:737:66
#21 0x0000557b03002ae8 main /var/tmp/ga87puy/hwlp/corev-llvm-project/llvm/tools/llc/llc.cpp:418:35
#22 0x00007fa960185083 __libc_start_main /build/glibc-SzIz7B/glibc-2.31/csu/../csu/libc-start.c:342:3
#23 0x0000557b0300184e _start (/var/tmp/ga87puy/hwlp/install/llvm2/bin/llc+0x139884e)
[1]    3337800 abort (core dumped)

#64 contains the fixes for this crash.

LLVM IR for reproducing the issue

Program: sequential/dijkstra

; ModuleID = 'dijkstra.c'
source_filename = "dijkstra.c"
target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
target triple = "riscv32-unknown-unknown"

%struct._QITEM = type { i32, i32, i32, ptr }
%struct._NODE = type { i32, i32 }

@dijkstra_checksum = dso_local local_unnamed_addr global i32 0, align 4
@dijkstra_AdjMatrix = external dso_local local_unnamed_addr global [100 x [100 x i8]], align 1
@dijkstra_queueCount = dso_local local_unnamed_addr global i32 0, align 4
@dijkstra_queueNext = dso_local local_unnamed_addr global i32 0, align 4
@dijkstra_queueHead = dso_local local_unnamed_addr global ptr null, align 4
@dijkstra_queueItems = dso_local global [1000 x %struct._QITEM] zeroinitializer, align 4
@dijkstra_rgnNodes = dso_local local_unnamed_addr global [100 x %struct._NODE] zeroinitializer, align 4

; Function Attrs: nofree nounwind
define dso_local void @dijkstra_init() local_unnamed_addr #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1)
store volatile i32 0, ptr %1, align 4, !tbaa !4
br label %2

2:                                                ; preds = %0, %13
%3 = phi i32 [ 0, %0 ], [ %14, %13 ]
br label %4

4:                                                ; preds = %2, %4
%5 = phi i32 [ 0, %2 ], [ %11, %4 ]
%6 = load volatile i32, ptr %1, align 4, !tbaa !4
%7 = getelementptr inbounds [100 x [100 x i8]], ptr @dijkstra_AdjMatrix, i32 0, i32 %3, i32 %5
%8 = load i8, ptr %7, align 1, !tbaa !8
%9 = trunc i32 %6 to i8
%10 = xor i8 %8, %9
store i8 %10, ptr %7, align 1, !tbaa !8
%11 = add nuw nsw i32 %5, 1
%12 = icmp eq i32 %11, 100
br i1 %12, label %13, label %4, !llvm.loop !9

13:                                               ; preds = %4
%14 = add nuw nsw i32 %3, 1
%15 = icmp eq i32 %14, 100
br i1 %15, label %16, label %2, !llvm.loop !11

16:                                               ; preds = %13
store i32 0, ptr @dijkstra_queueCount, align 4, !tbaa !4
store i32 0, ptr @dijkstra_queueNext, align 4, !tbaa !4
store ptr null, ptr @dijkstra_queueHead, align 4, !tbaa !12
store i32 0, ptr @dijkstra_checksum, align 4, !tbaa !4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1)
ret void
}

; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1

; Function Attrs: mustprogress nofree norecurse nosync nounwind readonly willreturn
define dso_local i32 @dijkstra_return() local_unnamed_addr #2 {
%1 = load i32, ptr @dijkstra_checksum, align 4, !tbaa !4
%2 = icmp ne i32 %1, 25
%3 = sext i1 %2 to i32
ret i32 %3
}

; Function Attrs: nofree norecurse nosync nounwind
define dso_local i32 @dijkstra_enqueue(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #3 {
%4 = load i32, ptr @dijkstra_queueNext, align 4, !tbaa !4
%5 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %4
%6 = load ptr, ptr @dijkstra_queueHead, align 4, !tbaa !12
%7 = add nsw i32 %4, 1
store i32 %7, ptr @dijkstra_queueNext, align 4, !tbaa !4
%8 = icmp sgt i32 %4, 998
br i1 %8, label %25, label %9

9:                                                ; preds = %3
store i32 %0, ptr %5, align 4, !tbaa !14
%10 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %4, i32 1
store i32 %1, ptr %10, align 4, !tbaa !16
%11 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %4, i32 2
store i32 %2, ptr %11, align 4, !tbaa !17
%12 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %4, i32 3
store ptr null, ptr %12, align 4, !tbaa !18
%13 = icmp eq ptr %6, null
br i1 %13, label %21, label %14

14:                                               ; preds = %9, %14
%15 = phi ptr [ %17, %14 ], [ %6, %9 ]
%16 = getelementptr inbounds %struct._QITEM, ptr %15, i32 0, i32 3
%17 = load ptr, ptr %16, align 4, !tbaa !18
%18 = icmp eq ptr %17, null
br i1 %18, label %19, label %14, !llvm.loop !19

19:                                               ; preds = %14
%20 = getelementptr inbounds %struct._QITEM, ptr %15, i32 0, i32 3
br label %21

21:                                               ; preds = %9, %19
%22 = phi ptr [ %20, %19 ], [ @dijkstra_queueHead, %9 ]
store ptr %5, ptr %22, align 4, !tbaa !12
%23 = load i32, ptr @dijkstra_queueCount, align 4, !tbaa !4
%24 = add nsw i32 %23, 1
store i32 %24, ptr @dijkstra_queueCount, align 4, !tbaa !4
br label %25

25:                                               ; preds = %3, %21
%26 = phi i32 [ 0, %21 ], [ -1, %3 ]
ret i32 %26
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn
define dso_local void @dijkstra_dequeue(ptr nocapture noundef writeonly %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #4 {
%4 = load ptr, ptr @dijkstra_queueHead, align 4, !tbaa !12
%5 = icmp eq ptr %4, null
br i1 %5, label %16, label %6

6:                                                ; preds = %3
%7 = load i32, ptr %4, align 4, !tbaa !14
store i32 %7, ptr %0, align 4, !tbaa !4
%8 = getelementptr inbounds %struct._QITEM, ptr %4, i32 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !16
store i32 %9, ptr %1, align 4, !tbaa !4
%10 = getelementptr inbounds %struct._QITEM, ptr %4, i32 0, i32 2
%11 = load i32, ptr %10, align 4, !tbaa !17
store i32 %11, ptr %2, align 4, !tbaa !4
%12 = getelementptr inbounds %struct._QITEM, ptr %4, i32 0, i32 3
%13 = load ptr, ptr %12, align 4, !tbaa !18
store ptr %13, ptr @dijkstra_queueHead, align 4, !tbaa !12
%14 = load i32, ptr @dijkstra_queueCount, align 4, !tbaa !4
%15 = add nsw i32 %14, -1
store i32 %15, ptr @dijkstra_queueCount, align 4, !tbaa !4
br label %16

16:                                               ; preds = %6, %3
ret void
}

; Function Attrs: mustprogress nofree norecurse nosync nounwind readonly willreturn
define dso_local i32 @dijkstra_qcount() local_unnamed_addr #2 {
%1 = load i32, ptr @dijkstra_queueCount, align 4, !tbaa !4
ret i32 %1
}

; Function Attrs: nofree nosync nounwind
define dso_local i32 @dijkstra_find(i32 noundef %0, i32 noundef %1) local_unnamed_addr #5 {
br label %3

3:                                                ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %7, %3 ]
%5 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %4
store i32 9999, ptr %5, align 4, !tbaa !20
%6 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %4, i32 1
store i32 9999, ptr %6, align 4, !tbaa !22
%7 = add nuw nsw i32 %4, 1
%8 = icmp eq i32 %7, 100
br i1 %8, label %9, label %3, !llvm.loop !23

9:                                                ; preds = %3
%10 = icmp eq i32 %0, %1
br i1 %10, label %99, label %11

11:                                               ; preds = %9
%12 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %0
store i32 0, ptr %12, align 4, !tbaa !20
%13 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %0, i32 1
store i32 9999, ptr %13, align 4, !tbaa !22
%14 = load i32, ptr @dijkstra_queueNext, align 4, !tbaa !4
%15 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %14
%16 = load ptr, ptr @dijkstra_queueHead, align 4, !tbaa !12
%17 = add nsw i32 %14, 1
store i32 %17, ptr @dijkstra_queueNext, align 4, !tbaa !4
%18 = icmp sgt i32 %14, 998
br i1 %18, label %99, label %19

19:                                               ; preds = %11
store i32 %0, ptr %15, align 4, !tbaa !14
%20 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %14, i32 1
store i32 0, ptr %20, align 4, !tbaa !16
%21 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %14, i32 2
store i32 9999, ptr %21, align 4, !tbaa !17
%22 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %14, i32 3
store ptr null, ptr %22, align 4, !tbaa !18
%23 = icmp eq ptr %16, null
br i1 %23, label %31, label %24

24:                                               ; preds = %19, %24
%25 = phi ptr [ %27, %24 ], [ %16, %19 ]
%26 = getelementptr inbounds %struct._QITEM, ptr %25, i32 0, i32 3
%27 = load ptr, ptr %26, align 4, !tbaa !18
%28 = icmp eq ptr %27, null
br i1 %28, label %29, label %24, !llvm.loop !19

29:                                               ; preds = %24
%30 = getelementptr inbounds %struct._QITEM, ptr %25, i32 0, i32 3
br label %31

31:                                               ; preds = %29, %19
%32 = phi ptr [ @dijkstra_queueHead, %19 ], [ %30, %29 ]
store ptr %15, ptr %32, align 4, !tbaa !12
%33 = load i32, ptr @dijkstra_queueCount, align 4, !tbaa !4
%34 = add nsw i32 %33, 1
store i32 %34, ptr @dijkstra_queueCount, align 4, !tbaa !4
%35 = icmp sgt i32 %33, -1
br i1 %35, label %38, label %99

36:                                               ; preds = %92
%37 = icmp sgt i32 %93, 0
br i1 %37, label %38, label %99

38:                                               ; preds = %31, %36
%39 = phi i32 [ %93, %36 ], [ %34, %31 ]
%40 = phi i32 [ %94, %36 ], [ %17, %31 ]
%41 = phi i32 [ %55, %36 ], [ 0, %31 ]
%42 = phi i32 [ %54, %36 ], [ 0, %31 ]
%43 = load ptr, ptr @dijkstra_queueHead, align 4, !tbaa !12
%44 = icmp eq ptr %43, null
br i1 %44, label %52, label %45

45:                                               ; preds = %38
%46 = load i32, ptr %43, align 4, !tbaa !14
%47 = getelementptr inbounds %struct._QITEM, ptr %43, i32 0, i32 1
%48 = load i32, ptr %47, align 4, !tbaa !16
%49 = getelementptr inbounds %struct._QITEM, ptr %43, i32 0, i32 3
%50 = load ptr, ptr %49, align 4, !tbaa !18
store ptr %50, ptr @dijkstra_queueHead, align 4, !tbaa !12
%51 = add nsw i32 %39, -1
store i32 %51, ptr @dijkstra_queueCount, align 4, !tbaa !4
br label %52

52:                                               ; preds = %38, %45
%53 = phi i32 [ %39, %38 ], [ %51, %45 ]
%54 = phi i32 [ %42, %38 ], [ %46, %45 ]
%55 = phi i32 [ %41, %38 ], [ %48, %45 ]
br label %56

56:                                               ; preds = %52, %92
%57 = phi i32 [ %53, %52 ], [ %93, %92 ]
%58 = phi i32 [ %40, %52 ], [ %94, %92 ]
%59 = phi i32 [ 0, %52 ], [ %97, %92 ]
%60 = phi i32 [ %40, %52 ], [ %96, %92 ]
%61 = phi i32 [ %53, %52 ], [ %95, %92 ]
%62 = getelementptr inbounds [100 x [100 x i8]], ptr @dijkstra_AdjMatrix, i32 0, i32 %54, i32 %59
%63 = load i8, ptr %62, align 1, !tbaa !8
%64 = zext i8 %63 to i32
%65 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %59
%66 = load i32, ptr %65, align 4, !tbaa !20
%67 = icmp eq i32 %66, 9999
%68 = add nsw i32 %55, %64
%69 = icmp sgt i32 %66, %68
%70 = select i1 %67, i1 true, i1 %69
br i1 %70, label %71, label %92

71:                                               ; preds = %56
store i32 %68, ptr %65, align 4, !tbaa !20
%72 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %59, i32 1
store i32 %54, ptr %72, align 4, !tbaa !22
%73 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %60
%74 = load ptr, ptr @dijkstra_queueHead, align 4, !tbaa !12
%75 = add nsw i32 %60, 1
store i32 %75, ptr @dijkstra_queueNext, align 4, !tbaa !4
%76 = icmp sgt i32 %60, 998
br i1 %76, label %99, label %77

77:                                               ; preds = %71
store i32 %59, ptr %73, align 4, !tbaa !14
%78 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %60, i32 1
store i32 %68, ptr %78, align 4, !tbaa !16
%79 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %60, i32 2
store i32 %54, ptr %79, align 4, !tbaa !17
%80 = getelementptr inbounds [1000 x %struct._QITEM], ptr @dijkstra_queueItems, i32 0, i32 %60, i32 3
store ptr null, ptr %80, align 4, !tbaa !18
%81 = icmp eq ptr %74, null
br i1 %81, label %89, label %82

82:                                               ; preds = %77, %82
%83 = phi ptr [ %85, %82 ], [ %74, %77 ]
%84 = getelementptr inbounds %struct._QITEM, ptr %83, i32 0, i32 3
%85 = load ptr, ptr %84, align 4, !tbaa !18
%86 = icmp eq ptr %85, null
br i1 %86, label %87, label %82, !llvm.loop !19

87:                                               ; preds = %82
%88 = getelementptr inbounds %struct._QITEM, ptr %83, i32 0, i32 3
br label %89

89:                                               ; preds = %87, %77
%90 = phi ptr [ @dijkstra_queueHead, %77 ], [ %88, %87 ]
store ptr %73, ptr %90, align 4, !tbaa !12
%91 = add nsw i32 %61, 1
store i32 %91, ptr @dijkstra_queueCount, align 4, !tbaa !4
br label %92

92:                                               ; preds = %56, %89
%93 = phi i32 [ %57, %56 ], [ %91, %89 ]
%94 = phi i32 [ %58, %56 ], [ %75, %89 ]
%95 = phi i32 [ %61, %56 ], [ %91, %89 ]
%96 = phi i32 [ %60, %56 ], [ %75, %89 ]
%97 = add nuw nsw i32 %59, 1
%98 = icmp eq i32 %97, 100
br i1 %98, label %36, label %56, !llvm.loop !24

99:                                               ; preds = %36, %71, %31, %11, %9
%100 = phi i32 [ 0, %9 ], [ -1, %11 ], [ 0, %31 ], [ -1, %71 ], [ 0, %36 ]
ret i32 %100
}

; Function Attrs: nofree nosync nounwind
define dso_local void @dijkstra_main() local_unnamed_addr #5 {
br label %1

1:                                                ; preds = %0, %10
%2 = phi i32 [ 50, %0 ], [ %16, %10 ]
%3 = phi i32 [ 0, %0 ], [ %15, %10 ]
%4 = srem i32 %2, 100
%5 = tail call i32 @dijkstra_find(i32 noundef %3, i32 noundef %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10

7:                                                ; preds = %1
%8 = load i32, ptr @dijkstra_checksum, align 4, !tbaa !4
%9 = add nsw i32 %8, -1
store i32 %9, ptr @dijkstra_checksum, align 4, !tbaa !4
br label %18

10:                                               ; preds = %1
%11 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %4
%12 = load i32, ptr %11, align 4, !tbaa !20
%13 = load i32, ptr @dijkstra_checksum, align 4, !tbaa !4
%14 = add nsw i32 %13, %12
store i32 %14, ptr @dijkstra_checksum, align 4, !tbaa !4
store i32 0, ptr @dijkstra_queueNext, align 4, !tbaa !4
%15 = add nuw nsw i32 %3, 1
%16 = add nsw i32 %4, 1
%17 = icmp eq i32 %15, 20
br i1 %17, label %18, label %1, !llvm.loop !25

18:                                               ; preds = %10, %7
ret void
}

; Function Attrs: nofree nounwind
define dso_local i32 @main() local_unnamed_addr #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1)
store volatile i32 0, ptr %1, align 4, !tbaa !4
br label %2

2:                                                ; preds = %13, %0
%3 = phi i32 [ 0, %0 ], [ %14, %13 ]
br label %4

4:                                                ; preds = %4, %2
%5 = phi i32 [ 0, %2 ], [ %11, %4 ]
%6 = load volatile i32, ptr %1, align 4, !tbaa !4
%7 = getelementptr inbounds [100 x [100 x i8]], ptr @dijkstra_AdjMatrix, i32 0, i32 %3, i32 %5
%8 = load i8, ptr %7, align 1, !tbaa !8
%9 = trunc i32 %6 to i8
%10 = xor i8 %8, %9
store i8 %10, ptr %7, align 1, !tbaa !8
%11 = add nuw nsw i32 %5, 1
%12 = icmp eq i32 %11, 100
br i1 %12, label %13, label %4, !llvm.loop !9

13:                                               ; preds = %4
%14 = add nuw nsw i32 %3, 1
%15 = icmp eq i32 %14, 100
br i1 %15, label %16, label %2, !llvm.loop !11

16:                                               ; preds = %13
store i32 0, ptr @dijkstra_queueCount, align 4, !tbaa !4
store i32 0, ptr @dijkstra_queueNext, align 4, !tbaa !4
store ptr null, ptr @dijkstra_queueHead, align 4, !tbaa !12
store i32 0, ptr @dijkstra_checksum, align 4, !tbaa !4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1)
br label %17

17:                                               ; preds = %26, %16
%18 = phi i32 [ 50, %16 ], [ %32, %26 ]
%19 = phi i32 [ 0, %16 ], [ %31, %26 ]
%20 = srem i32 %18, 100
%21 = tail call i32 @dijkstra_find(i32 noundef %19, i32 noundef %20)
%22 = icmp eq i32 %21, -1
br i1 %22, label %23, label %26

23:                                               ; preds = %17
%24 = load i32, ptr @dijkstra_checksum, align 4, !tbaa !4
%25 = add nsw i32 %24, -1
store i32 %25, ptr @dijkstra_checksum, align 4, !tbaa !4
br label %34

26:                                               ; preds = %17
%27 = getelementptr inbounds [100 x %struct._NODE], ptr @dijkstra_rgnNodes, i32 0, i32 %20
%28 = load i32, ptr %27, align 4, !tbaa !20
%29 = load i32, ptr @dijkstra_checksum, align 4, !tbaa !4
%30 = add nsw i32 %29, %28
store i32 %30, ptr @dijkstra_checksum, align 4, !tbaa !4
store i32 0, ptr @dijkstra_queueNext, align 4, !tbaa !4
%31 = add nuw nsw i32 %19, 1
%32 = add nsw i32 %20, 1
%33 = icmp eq i32 %31, 20
br i1 %33, label %34, label %17, !llvm.loop !25

34:                                               ; preds = %26, %23
%35 = phi i32 [ %25, %23 ], [ %30, %26 ]
%36 = icmp ne i32 %35, 25
%37 = sext i1 %36 to i32
ret i32 %37
}

attributes #0 = { nofree nounwind "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+m,+relax,+xcvbi,-save-restore" }
attributes #1 = { argmemonly mustprogress nocallback nofree nosync nounwind willreturn }
attributes #2 = { mustprogress nofree norecurse nosync nounwind readonly willreturn "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+m,+relax,+xcvbi,-save-restore" }
attributes #3 = { nofree norecurse nosync nounwind "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+m,+relax,+xcvbi,-save-restore" }
attributes #4 = { mustprogress nofree norecurse nosync nounwind willreturn "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+m,+relax,+xcvbi,-save-restore" }
attributes #5 = { nofree nosync nounwind "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+32bit,+m,+relax,+xcvbi,-save-restore" }

!llvm.module.flags = !{!0, !1, !2}
!llvm.ident = !{!3}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 1, !"target-abi", !"ilp32"}
!2 = !{i32 1, !"SmallDataLimit", i32 8}
!3 = !{!"clang version 16.0.0 ([email protected]:PhilippvK/corev-llvm-project.git f138c532b40c6bcc9b98245f2769f6b9efab4e80)"}
!4 = !{!5, !5, i64 0}
!5 = !{!"int", !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!6, !6, i64 0}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !6, i64 0}
!14 = !{!15, !5, i64 0}
!15 = !{!"_QITEM", !5, i64 0, !5, i64 4, !5, i64 8, !13, i64 12}
!16 = !{!15, !5, i64 4}
!17 = !{!15, !5, i64 8}
!18 = !{!15, !13, i64 12}
!19 = distinct !{!19, !10}
!20 = !{!21, !5, i64 0}
!21 = !{!"_NODE", !5, i64 0, !5, i64 4}
!22 = !{!21, !5, i64 4}
!23 = distinct !{!23, !10}
!24 = distinct !{!24, !10}
!25 = distinct !{!25, !10}

HWLP Behavior difference between LLVM and GCC

Currently Hwlp would only perform bit shift when a non immediate is given like cv.starti 0, foo. However on the gcc side it performs bit shift for user input and crops it. As a result, uimml in LLVM can only be in range [0, 4094] while in GCC it can be [0, 16380] (note that everything not at multiple of 4 will be cropped in the bit shift process in gcc, and a warning is shown)