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View Code? Open in Web Editor NEW2 architectures 2 simulators, a compiler and a binary translator. MIPT students group
2 architectures 2 simulators, a compiler and a binary translator. MIPT students group
Some sort of ISA would be helpful.
Nucleus 2.0. Coming soon...
In the layout table there should be a fourth operation type - adress operations with 2 bytes of adress. Because, provided one-byte length only 256 cells could be adressed. But task specifications claims 2-dimensional arrays 100x100 which reqire 10000 random adressed cells of memory.
In order to following a clean RISC way, i think they should differ for integer and floating point arguments:
addi - addd
subi - subd
muli - muld
divi - divd
rem is an integer operation, so it doesn't need type specification.
Develop a notation for indexing a multi-dimensional arrays.
In order to translate text files from compiler to a binary files, understood by binary translator and interpreter.
Single dimension case.
Let it be a: array [ index ]
As I've mentioned in #1 there must be an operation for putting special data, named array's head, containing a type and a length of an array.
Convert data between operations where needed
Create a convinient interface for compiler.
Enable multidimensional arrays in syntax
Do type analisys in a AST and derive types for each load and store operation
Code itself is great, but we need some sort of demonstration of its correctness.
You could find a draft of parallel machine ISA on wiki pages.
Make a wiki page with description of all build in functions, which can be called by call instruction.
Enable a basic array support.
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