melchisedech333 / transistor-simulator Goto Github PK

Language: PT-BR

First, it's important to make it clear that I made this code for fun. I really want to develop things using transistors, so I made this code. And it also just gave me a great desire to create a code that did binary sum using logic gates, but also that these logic gates were built with transistors (as close as possible to the operation of real transistors).

In the code I create the 2 known types of MOSFET transistors (N and P). It is important to make it clear that transistors only work with two voltage levels, represented by 0 and 1, where 0 means no voltage applied (and no electrical current passing through the Drain and Source channels), and 1 means that there is an X value of voltage or electrical current applied to the respective channels.

It is worth remembering that the basic operation of a MOSFET transistor is defined by the voltage (Volts) that is applied to the Gate, causing the electric current to flow in the Drain and Source channels.

N-TYPE:

In an N-type transistor, electrical current flows from the Drain towards the Source. The table below explains how the transistor works as the Gate changes.

       ------------->
GATE | DRAIN | SOURCE 
---------------------
0    | 0     | 0
1    | 0     | 0
0    | 1     | 0
1    | 1     | 1

Regarding the Gate, when it has the value 0 (zero), it means that there is no voltage applied to it. Following the same logic, when there is a value of 1, it means that there is enough voltage applied to the Gate, making it work as an electronic switch, that is, allowing the electric current to flow from the Drain to the Source.

Regarding Drain and Source, when the value is as 0 (zero), it means that there is no voltage and no electrical current. And when there is a value of 1, it means that there is voltage and/or electrical current applied to them.

P-TYPE:

In a P-type transistor, electrical current flows from the Source towards the Drain.

       ------------->
GATE | SOURCE | DRAIN
---------------------
0    | 0      | 0
1    | 0      | 0
0    | 1      | 1
1    | 1      | 0

Using the transistors with the above logic, communication channels are created between them, so that the logic gates are created. That is, to carry out the communication I created the equivalent of the wires that connect the transistor channels, as shown in the code below in the creation of the NOT logic gate (to see the complete code, access gate -construction.c).

// Creates two transistors, one P-type, one N-type.
// First on the list is the P-type transistor.
gate->transistors = get_transistors(1, 1);

// Adds wires to communicate between transistor channels.
add_wire(GATE_PIN_VDD, 0, first_p(), PIN_TRANSISTOR_SOURCE);
add_wire(GATE_PIN_INPUT1, 0, first_p(), PIN_TRANSISTOR_GATE);
add_wire(first_p(), PIN_TRANSISTOR_DRAIN, GATE_PIN_OUTPUT, 0);
add_wire(GATE_PIN_INPUT1, 0, first_n(), PIN_TRANSISTOR_GATE);
add_wire(first_n(), PIN_TRANSISTOR_DRAIN, GATE_PIN_OUTPUT, 0);
add_wire(first_n(), PIN_TRANSISTOR_SOURCE, GATE_PIN_GROUND, 0);

Note that the Vdd (which represents the positive) is the origin of the first wire connected, and the Ground is the last.

The code above performs the following logical scheme:

Disabled

Enabled

Note: the N-type transistor placed at the CMOS output (P and N) is just to demonstrate the operation of the logic gate, causing it to drive a transistor that controls an LED. As you can see, the LED turns on and off according to the on/off state of the logic port.

Using the notions exposed above, the following ports were built:

NOT

NAND

AND (NAND + NOT)

XOR (using NAND gates)

OR (using NAND gates)

The code responsible for processing the logic gates and transistors is gate-machine.c.

Using all these things it was possible to build a Half Adder mechanism, similar to the one shown in the image to the side. With the difference that not only the XOR and AND gates were used, but also the OR and NOT gates.

For more details you can analyze the algorithm in the file device-arithmetic.c, where the Half Adder mechanism was created to be used in the implemented binary sum algorithm in the process_sum() function.

Here is the output of the program:

Operation: SUM (+)

         BINARY     | DEC
         ----------------
                    |
         0000000101 | 5
         0000000011 | 3
         ----------------
         0000001000 | 8

Finally, summarizing everything, the MOSFET transistors of type P and N were simulated, and with them logic gates were implemented, such as AND, NOT, NAND and others. With the logic gates, the Half Adder mechanism was implemented, and with it a binary sum algorithm was developed (to simulate a calculating machine).

If my code has helped you, please consider sponsoring me 💙

To compile the code, simply run the build.sh script. It will generate the machine file.

./build.sh
./machine

Sponsor: melchisedech333
Twitter: Melchisedech333
LinkedIn: Melchisedech Rex
Blog: melchisedech333.github.io

BSD-3-Clause license