liv2 / bluster Goto Github PK

By routing pins 25, 43, and 44 on the 48-pin DIP socket to free pins on the CPLD, it is possible to reuse the PCB to replace the Gary chip in an A500, using a different RTL.

Sorry I cannot seem to find a forum or link to ask questions about this.

Which version of the buster does this emulate for the A2000?

Your notes don't say either.

Thanks,

Hello,

I just finished reverse-engineering a silicon die shot of BUSTER.
There are a few discrepancies between the extracted schematics and your verilog code.
I'm not familiar with the Amiga so I can't really tell if those are from modifications needed for the CPLD to work, or consequences of guessing the logic by observing the signals ?

https://github.com/furrtek/SiliconRE/tree/master/Commodore/CSG5721

Change the LDO footprint to be the standard LM1117 footprint.
I made a mistake choosing the TC1262 which as a different footprint to the LM1117.

The other day I was playing around with placing an XC9572XL-10VQ64C in between the rows of a DIP40 socket, and ended up with something like this:

Not sure if it could work for your Bluster design, but if possible it could reduce the size of the PCB a little.

I have installed Buster-Lite on a RPi and when I try to run

sudo apt-get update

, it says

E: The repository 'https://apt.matrix.one/raspian buster Release' does not have a Release file.

and it won't allow updates from that repository.

Should I use buster or bullseye? Is there something else I am missing?

Thanks...