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Automatically exported from code.google.com/p/qed
As an optimization, we use localized states hoping that localized states can be
allocated to the memory: e.g., localTailIndex in spQed.
However, especially in x86 with few register files, this kind of optimization
does not make sense.
We really need to quantify this optimization helps the performance.
Original issue reported on code.google.com by [email protected]
on 7 Dec 2010 at 9:01
To avoid false sharing we align certain member variables at cache line
boundaries.
For example, in SpQed,
{{{
union {
struct {
volatile int headIndex;
volatile int headIndexMod;
};
volatile long packedHeadIndex;
} __attribute__((aligned (64)));
volatile int reservedDequeueCounter;
}}}
The intention is that headIndex is aligned at cache line boundary and
reservedDequeueCounter is located at the same cache line since they are
modified together.
However, according to the generated assembly code, reservedDequeueCounter is
located at the next cache line.
We need to find out the way to locate them to the same cache line, and, of
course, need to measure the performance impact of doing so.
Original issue reported on code.google.com by [email protected]
on 7 Dec 2010 at 9:07
What steps will reproduce the problem?
1. run ferret with qed_static and qed
2. compare the performance
What is the expected output? What do you see instead?
They should have a similar execution time but qed is 4% slower.
We need to look at the decision procedure to adjust the capacity.
Original issue reported on code.google.com by [email protected]
on 7 Dec 2010 at 8:59
I thought
{{{
volatile union {
struct {
int i1;
int i2;
};
long l;
};
}}}
will render i1, i2, and l volatile.
But according to the generated assembly code, this is not the case.
We have to use volatile as follows:
{{{
union {
struct {
volatile int i1;
volatile int i2;
};
volatile long l;
};
}}}
Original issue reported on code.google.com by [email protected]
on 7 Dec 2010 at 9:11
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