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License: Apache License 2.0
We should add one or more benchmarks that can test the power of the DNC versus something like an LSTM. This can also serve as a test to ensure that everything inside the DNC is working correctly.
Have we decided what will be the architecture of the model?
The DNC paper shows renderings of the internals of the memory network and read/writes heads over consecutive time steps, which makes it easy to comprehend the network's behavior. Implementing a simple viewer that can be run from the REPL would be, in my opinion, immensely beneficial for developing and debugging the DNC.
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