This is a VLSI designing Project. This Project is created using Cadence Virtuoso software.

It Includes Basic Logic Gates to simple ALU design.

Logic Gates like AND,OR,NAND,NOR XOR. Also used this Logic Gates to design Inverter, Transmission Gate, 1-Bit Add/Subtract, 4-Bit Adder, Multipler, Divider, D-FlipFlop, 2:1, 8:1 Multiplexer.

Check PDF for more details. There is screenshots of all circuit's Schematic, Symbol, testbench, Simulation, Layout, Postlayout-simulation, DRC, LVS and calulations.

D-FlipFlop Schematic D-FlipFlop TestBench D-FlipFlop Layout

8:1 MUX Schematic 8:1 MUX TestBench 8:1 MUX Layout

4-Bit Adder Schematic 4-Bit Adder TestBench 4-Bit Adder Layout

4-Bit Multipler Schematic 4-Bit Multipler TestBench 4-Bit Multipler Layout 4-Bit Multipler Waveform

4-Bit Divider Schematic 4-Bit Divider TestBench 4-Bit Divider Layout