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View Code? Open in Web Editor NEWFPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)
FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)
Hello,
I have issue with my project based on DE0 SoC Nano. During boot, i got:
1.344394] ttyS0 - failed to request DMA
[ 1.353905] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 25000000 Hz, actual 25000000HZ div = 1)
** 68 printk messages dropped ** [ 1.357089] dwc2 ffb40000.usb: Overcurrent c hange detected
** 181 printk messages dropped ** [ 1.365456] dwc2 ffb40000.usb: Overcurrent change detected
Thanks for your advice.
Best regards,
Petr.
fpga@debian-fpga:~$ su
Password:
[ 25.015557] systemd-journald[812]: File /var/log/journal/d3b7f29cade24feca5b52fc03384fcd2/user-1000.journal corrupted or uncleanly shut down, renaming and replacing.
[ 25.095802] systemd-journald[812]: Failed to set ACL on /var/log/journal/d3b7f29cade24feca5b52fc03384fcd2/user-1000.journal, ignoring: Operation not supported
I'm looking into an automatic build of all components and the resulting image files with Jenkins
Anybody done this/working on it?
Hello KAWAZOME Ichiro,
I want to work with my project that i developped on quartus but, when I want to change .dts and .rbf, kernel doesn't work. I think i have to work with dtbocfg-ctrl but I don't konw how can I do this modification, do you any explaination ?
Thank you
Format SD-Card for DE0-Nano-Soc
Create new partions
执行:sudo sh scripts/format-disk-de0-nano-soc.sh
出错:
fdisk: bad usage
Try 'fdisk --help' for more information.
If you git clone, you may get the following error and fail
" batch response: This repository is over its data quota. Account responsible for LFS bandwidth should purchase more data packs to restore access.
error: failed to fetch some objects from ' https://github.com/ikwzm/FPGA-SoC-Linux.git/info/lfs'"
This happens when I exceed the LFS bandwidth I have contracted with github.
This repository has many large binary files stored on the LFS.
Therefore, when I clone this repository, it may exceed my bandwidth for a month trying to download these large binary files.
I am retired and have no income, so I cannot increase my bandwidth any further.
If you only want to download the latest version, download only what you need from the following URL
shell$ wget https://github.com/ikwzm/FPGA-SoC-Linux/archive/refs/tags/v2.2.0.tar.gz
--2023-06-02 00:57:26-- https://github.com/ikwzm/FPGA-SoC-Linux/archive/refs/tags/v2.2.0.tar.gz
Resolving github.com (github.com)... 20.27.177.113
Connecting to github.com (github.com)|20.27.177.113|:443... connected.
HTTP request sent, awaiting response... 302 Found
Location: https://codeload.github.com/ikwzm/FPGA-SoC-Linux/tar.gz/refs/tags/v2.2.0 [following]
--2023-06-02 00:57:26-- https://codeload.github.com/ikwzm/FPGA-SoC-Linux/tar.gz/refs/tags/v2.2.0
Resolving codeload.github.com (codeload.github.com)... 20.27.177.114
Connecting to codeload.github.com (codeload.github.com)|20.27.177.114|:443... connected.
HTTP request sent, awaiting response... 200 OK
Length: unspecified [application/x-gzip]
Saving to: ‘v2.2.0.tar.gz’
v2.2.0.tar.gz [ <=> ] 417.07M 20.4MB/s in 23s
2023-06-02 00:57:49 (18.4 MB/s) - ‘v2.2.0.tar.gz’ saved [437329638]
This repository doesn't include license.md
.
What license is applied to the original code on this repository ?
For most files like linux kernel, of course, their license will be applied.
But this repository also includes original patches to improve some features.
I want to know license about those parts.
has anybody looked into using RT-PREEMPT capable kernels for this project?
FPGA-SoC-Linux v0.3.2
いつもたいへん貴重な情報を発信していただき,ありがとうございます.
今Pynqのブートイメージと利用させて頂いているのですが,
PynqのUSB HOST(USB OTG)が機能していません.
qiitaのZynq + Yocto で USB デバイスをつくってみたを参考にして,
usb_ulpi=yにしたzImageに置き換えて試してみたのですが,
解決しませんでした.
お手数とは存じますが,解決策があればご教授頂けると幸いです。
Hi!
I have instantiated a uart on my FPGA(de0-nano-soc) and connected it to the hps2fpga bridge at address 0x000004000. Now I want to be able to use this as a serial device from linux.
When I generate the dts file via SoCEDS from intel I get the following record in it:
sopc0: sopc@0 {
device_type = "soc";
ranges;
#address-cells = <1>;
#size-cells = <1>;
compatible = "ALTR,avalon", "simple-bus";
bus-frequency = <0>;
hps_bridges: bridge@0xc0000000 {
compatible = "altr,bridge-17.1", "simple-bus";
reg = <0xc0000000 0x20000000>,
<0xff200000 0x00200000>;
reg-names = "axi_h2f", "axi_h2f_lw";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0x00000000 0x00004000 0xc0004000 0x00000020>,
<0x00000000 0x00000000 0xc0000000 0x00002180>,
<0x00000001 0x00000000 0xff200000 0x00002180>;
uart0: serial@0x000004000 {
compatible = "altr,uart-17.1", "altr,uart-1.0";
reg = <0x00000000 0x00004000 0x00000020>;
interrupt-parent = <&hps_arm_gic_0>;
interrupts = <0 40 4>;
clock-frequency = <50000000>;
current-speed = <19200>;
};
...
But this dts file in general is different then the one included in the linux kernel. If I just add the hps_bridges
node and modify the interrupt-parent
of uart0
to point to the correct phandle in my own decompiled dtb and recompile I do see my serial device. However when I read or write to the device file the OS crashes with the following messages:
[ 84.043042] Internal error: : 406 [#1] SMP ARM
[ 84.047484] Modules linked in: xt_policy authenc echainiv twofish_generic twofish_common serpent_generic blowfish_generic blowfish_common cast5_generic cast_common ux500_cryp des_generic algif_skcipher camellia_generic xcbc sha512_generic sha512_arm ux500_hash sha1_generic sha1_arm_neon sha1_arm md5 md4 algif_hash af_alg xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 wireguard(O) af_key xfrm_algo fpgacfg(O) cfg80211 dtbocfg(O) configfs 8021q zptty(O) udmabuf(O) nls_iso8859_1 nls_cp437 phy_generic altera_uart socfpga fpga_mgr uio_pdrv_genirq uio iptable_nat nf_nat_ipv4 nf_nat nf_conntrack_ipv6 nf_defrag_ipv6 nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_conntrack ip6t_rpfilter ipt_rpfilter ip6table_raw iptable_raw xt_pkttype nf_log_ipv6 nf_log_ipv4 nf_log_common xt_LOG xt_tcpudp ip6table_filter ip6_tables iptable_filter tun ip_tables x_tables dm_mod
[ 84.123982] CPU: 1 PID: 1747 Comm: screen Tainted: G O 4.9.142 #1-NixOS
[ 84.131712] Hardware name: Altera SOCFPGA
[ 84.135717] task: ec630000 task.stack: ec690000
[ 84.140249] PC is at altera_uart_get_mctrl+0x2c/0x48 [altera_uart]
[ 84.146423] LR is at uart_tiocmget+0x5c/0x94
[ 84.150689] pc : [<bf163060>] lr : [<c08926d8>] psr: 600f0093
[ 84.150689] sp : ec691e48 ip : ec691e58 fp : ec691e54
[ 84.162136] r10: 00000000 r9 : ed907a00 r8 : bea13274
[ 84.167350] r7 : 00000006 r6 : edc44094 r5 : 00000006 r4 : bf165280
[ 84.173859] r3 : f0cde008 r2 : 00000000 r1 : 00000008 r0 : bf165280
[ 84.180370] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment none
[ 84.187578] Control: 10c5387d Table: 2c5f004a DAC: 00000051
[ 84.193310] Process screen (pid: 1747, stack limit = 0xec690220)
[ 84.199302] Stack: (0xec691e48 to 0xec692000)
[ 84.203657] 1e40: ec691e74 ec691e58 c08926d8 bf163040 00005415 ed907a00
[ 84.211821] 1e60: edbb6cc0 00000006 ec691efc ec691e78 c0876940 c0892688 ec691ea4 00000006
[ 84.219984] 1e80: ec691ea8 ec691f5c 00000001 c0309a24 ec690000 c04c8e58 ec691f4c ec691ea8
[ 84.228149] 1ea0: c04c8e58 c04c23a0 ee995b10 ee45fcc0 a8ba57f7 00000006 ee9bb015 ec691ec8
[ 84.236313] 1ec0: 00000000 c04b6a8c eeb981d0 00000101 00000002 bea13274 eeb981d0 edbb6cc0
[ 84.244476] 1ee0: 00000006 bea13274 ec690000 00000036 ec691f7c ec691f00 c04cb604 c0876300
[ 84.252641] 1f00: ec691f3c c04c8014 00000001 edbb6cc8 00000020 ee9bb000 edbb6cc0 ee9bb000
[ 84.260804] 1f20: 00000020 edbb6cc8 ec691f4c ec691f38 c04c8014 c04a3aac 00000006 edbb6cc0
[ 84.268967] 1f40: ec691f94 ec691f50 c04b69f4 c04c7fb8 00000000 edbb6cc0 edbb6cc0 00000006
[ 84.277130] 1f60: 00005415 bea13274 ec690000 00000036 ec691fa4 ec691f80 c04cbee0 c04cb560
[ 84.285295] 1f80: 00000006 bea13278 bea13274 00000036 c0309a24 ec690000 00000000 ec691fa8
[ 84.293459] 1fa0: c0309840 c04cbea8 00000006 bea13278 00000006 00005415 bea13274 00000406
[ 84.301621] 1fc0: 00000006 bea13278 bea13274 00000036 b6fda900 00000000 00000000 b6fda900
[ 84.309785] 1fe0: 0007eb70 bea1326c 0002f8bc b6e6d5dc 600f0010 00000006 00000000 00000000
[ 84.317985] [<bf163060>] (altera_uart_get_mctrl [altera_uart]) from [<c08926d8>] (uart_tiocmget+0x5c/0x94)
[ 84.327643] [<c08926d8>] (uart_tiocmget) from [<c0876940>] (tty_ioctl+0x64c/0xe7c)
[ 84.335221] [<c0876940>] (tty_ioctl) from [<c04cb604>] (do_vfs_ioctl+0xb0/0x948)
[ 84.342618] [<c04cb604>] (do_vfs_ioctl) from [<c04cbee0>] (SyS_ioctl+0x44/0x68)
[ 84.349934] [<c04cbee0>] (SyS_ioctl) from [<c0309840>] (ret_fast_syscall+0x0/0x48)
[ 84.357503] Code: e3a01008 e0833211 e5932000 f57ff04f (e590312c)
[ 84.363591] ---[ end trace ceddac7d9e91c9fc ]---
So then I tried adding the record to the device_tree_source
in https://github.com/ikwzm/FPGA-SoC-Linux/blob/master/drivers/fpga-bridge/altera-hps2fpga.rb and also added a call to modprobe altera_uart
:
def device_tree_source(rst, l4_main_clk)
return <<" EOF"
/dts-v1/;
/ {
#{@name}@0 {
target-path = "/soc";
__overlay__ {
hps_fpgabridge0: fpgabridge@0 {
compatible = "altr,socfpga-hps2fpga-bridge";
label = "hps2fpga";
resets = <#{rst} #{HPS2FPGA_RESET}>;
reset-names = "hps2fpga";
clocks = <#{l4_main_clk}>;
};
};
};
#{@name}@1 {
target-path = "/soc";
__overlay__ {
hps_fpgabridge1: fpgabridge@1 {
compatible = "altr,socfpga-lwhps2fpga-bridge";
label = "lwhps2fpga";
resets = <#{rst} #{LWHPS2FPGA_RESET}>;
reset-names = "lwhps2fpga";
clocks = <#{l4_main_clk}>;
};
};
};
#{@name}@2 {
target-path = "/soc";
__overlay__ {
hps_fpgabridge2: fpgabridge@2 {
compatible = "altr,socfpga-fpga2hps-bridge";
label = "fpga2hps";
resets = <#{rst} #{FPGA2HPS_RESET}>;
reset-names = "fpga2hps";
clocks = <#{l4_main_clk}>;
};
};
};
#{@name}@3 {
target-path = "/soc";
__overlay__ {
#address-cells = <0x1>;
#size-cells = <0x1>;
l3regs@0xff800000 {
compatible = "altr,l3regs", "syscon";
reg = <0xff800000 0x1000>;
};
};
};
#{@name}@4 {
target-path = "/soc";
__overlay__ {
bridge@0xc0000000 {
#address-cells = <2>;
#size-cells = <1>;
serial@0x000004000 {
compatible = "altr,uart-17.1", "altr,uart-1.0";
reg = <0x00000000 0x00004000 0x00000020>;
interrupt-parent = <2>;
interrupts = <0 40 4>;
clock-frequency = <50000000>;
current-speed = <19200>;
};
};
};
};
};
EOF
end
...
@command.each do |command|
case command
when :install then
devtree_install
system("modprobe altera_uart")
system("modprobe fpga-bridge")
system("modprobe altera-hps2fpga")
when :remove then
system("rmmod altera-hps2fpga")
system("rmmod fpga-bridge")
devtree_remove
end
end
...
However nothing happens when I do this. What is the way to add soft peripherals? I can't find anything online.
I'm on kernel version 4.9.142
On the following Linux distribution:
Linux de0-nano-soc 4.8.10 #1-NixOS SMP Mon Nov 21 09:11:59 UTC 2016 armv7l GNU/Linux
I'm trying to manually compile the kernel modules using the following script:
cd drivers
for dir in dtbocfg fpgacfg fclkcfg udmabuf zptty fpga-bridge; do
cd $dir
make CFLAGS_MODULE=-fno-pic KERNEL_SRC_DIR=${kernel.dev}/lib/modules/${kernel.version}/build all
cd ..
done
The reason for not using drivers/Makefile is because it hard codes KERNEL_SRC_DIR
.
The modules compile, but as soon as I try to modprobe them, the following error shows up in dmesg:
udmabuf: Unknown symbol _GLOBAL_OFFSET_TABLE_ (err 0)
The above error is for udmabuf
, but it happens to every single module. I've Googled the issue and found about a dozen different websites saying that one should set CFLAGS_MODULE=-fno-pic
in the Makefile or make command. I've done that (see the compile script posted above), but it has no effect. The error still happens.
I'm not well versed in compiling kernel modules, so I'm stuck here. Any idea what I could be doing wrong?
Kernel:
Linux lumi-sign-fpgatest 4.8.17 #1-NixOS SMP Mon Jan 9 07:22:35 UTC 2017 armv7l GNU/Linux
Device: Altera de0-nano-soc
Revision: 17c0958
Immediately after issuing altera-hps2fpga.rb --install
I get the following error:
[ 33.571895] Unable to handle kernel paging request at virtual address 6572336c
[ 33.579160] pgd = eca0c000
[ 33.581875] [6572336c] *pgd=00000000
[ 33.585486] Internal error: Oops: 5 [#1] SMP ARM
[ 33.590090] Modules linked in: af_packet xfrm_user xfrm4_tunnel tunnel4 ipcomp xfrm_ipcomp esp4 ah4 af_key xfrm_algo cfg80211 nf_conntrack_ipv6 nf_defrag_ipv6 nf_conntrack_ipv4 nf
_defrag_ipv4 xt_conntrack ip6t_rpfilter ipt_rpfilter ip6table_raw iptable_raw xt_pkttype nf_log_ipv6 nf_log_ipv4 nf_log_common xt_LOG xt_tcpudp ip6table_filter ip6_tables iptable_fil
ter fpgacfg(O) dtbocfg(O) configfs udmabuf(O) zptty(O) snd_pcm_oss snd_pcm snd_timer snd soundcore nf_conntrack_ftp nf_conntrack ip_tables x_tables ipv6
[ 33.635470] CPU: 1 PID: 939 Comm: ruby Tainted: G O 4.8.17 #1-NixOS
[ 33.642839] Hardware name: Altera SOCFPGA
[ 33.646836] task: ecb585c0 task.stack: ecb9c000
[ 33.651360] PC is at __kmalloc_track_caller+0x94/0x28c
[ 33.656481] LR is at 0xecb9dd00
[ 33.659614] pc : [<c04a2bb0>] lr : [<ecb9dd00>] psr: 200f0013
[ 33.659614] sp : ecb9dd00 ip : ecb9dd00 fp : ecb9dd44
[ 33.671046] r10: ee801e40 r9 : c17be4b8 r8 : c0c0abcc
[ 33.676253] r7 : 024000c0 r6 : ee801e40 r5 : 00000004 r4 : 6572336c
[ 33.682761] r3 : 00000000 r2 : c156dbf0 r1 : 2e173000 r0 : ee801e40
[ 33.689266] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
[ 33.696385] Control: 10c5387d Table: 2ca0c04a DAC: 00000051
[ 33.702117] Process ruby (pid: 939, stack limit = 0xecb9c220)
[ 33.707847] Stack: (0xecb9dd00 to 0xecb9e000)
[ 33.712200] dd00: c05277ec c06b7bc0 ee8b0510 0000a1af ecb9dd44 ecb9dd20 c052849c 024000c0
[ 33.720362] dd20: 00000004 eca94840 eef8862c eef8862c ee9b7000 eca928c0 ecb9dd64 ecb9dd48
[ 33.728524] dd40: c0469494 c04a2b28 eca94840 00000001 eca94840 eef8862c ecb9dd84 ecb9dd68
[ 33.736686] dd60: c0c0abcc c0469464 eca94840 eef88600 eca94800 ffffffff ecb9ddb4 ecb9dd88
[ 33.744848] dd80: c0c0c790 c0c0ab44 00000001 c0c0c89c 00000000 eca94800 eef88600 eca98680
[ 33.753010] dda0: eca928d8 00000018 ecb9ddd4 ecb9ddb8 c0c0c8bc c0c0c720 eca94980 800f0013
[ 33.761172] ddc0: 00000000 eca928d8 ecb9ddfc ecb9ddd8 c0c0f8b8 c0c0c810 ecb9de04 eca93a00
[ 33.769333] dde0: c0c0b358 eca94980 eca92814 00000000 ecb9de34 ecb9de00 c0c0fc2c c0c0f6c0
[ 33.777495] de00: c0c14cf4 c0c0b318 eca928c0 00000004 eca92800 eca928d8 eca928d8 00000004
[ 33.785657] de20: eca92800 eca928d8 ecb9de84 ecb9de38 c0c15040 c0c0fc08 024000c0 c0c0edb8
[ 33.793819] de40: 00000000 eca92804 00000001 eca92814 edea0348 ecb9de60 c0c10658 00000001
[ 33.801981] de60: eef88000 0029ff88 eca927d8 eef00600 ecb9df78 00000051 ecb9dea4 ecb9de88
[ 33.810144] de80: bf13f210 c0c14df4 ecb9dea4 00000001 00000001 eca927c0 ecb9ded4 ecb9dea8
[ 33.818305] dea0: bf12f974 bf13f168 ecb9df78 eef00600 bf12f884 ecb9df78 00000001 0029ff88
[ 33.826466] dec0: 00000001 00000000 ecb9df44 ecb9ded8 c04b41d4 bf12f890 00000817 c0d85068
[ 33.834628] dee0: 002a1f8c ecb9dfb0 00002710 000001ff ecb9dfac ecb9df00 c0301230 c0d85074
[ 33.842789] df00: eef00608 ecb9df10 c04d5084 ee9b7000 eef00600 c04b5070 c2546e10 c04b86f8
[ 33.850951] df20: 00000001 eef00600 0029ff88 ecb9df78 0029ff88 00000001 ecb9df74 ecb9df48
[ 33.859112] df40: c04b50b0 c04b41a4 eef00603 b6e22a1c ecb9df74 eef00603 eef00600 00000000
[ 33.867274] df60: 00000000 0029ff88 ecb9dfa4 ecb9df78 c04b5ec8 c04b5008 00000000 00000000
[ 33.875435] df80: 0029ff08 b6e22a1c 0029ff08 00000004 c0309764 ecb9c000 00000000 ecb9dfa8
[ 33.883597] dfa0: c03095a0 c04b5e88 0029ff08 b6e22a1c 00000007 0029ff88 00000001 00000000
[ 33.891758] dfc0: 0029ff08 b6e22a1c 0029ff08 00000004 00000001 00022c78 00000882 bec20fb4
[ 33.899919] dfe0: 00000000 bec20d00 b6ff7880 b6d83338 800f0010 00000007 00000000 00000000
[ 33.908101] [<c04a2bb0>] (__kmalloc_track_caller) from [<c0469494>] (kstrdup+0x3c/0x68)
[ 33.916106] [<c0469494>] (kstrdup) from [<c0c0abcc>] (safe_name+0x94/0xb8)
[ 33.922974] [<c0c0abcc>] (safe_name) from [<c0c0c790>] (__of_add_property_sysfs+0x7c/0xf0)
[ 33.931228] [<c0c0c790>] (__of_add_property_sysfs) from [<c0c0c8bc>] (__of_attach_node_sysfs+0xb8/0xf8)
[ 33.940607] [<c0c0c8bc>] (__of_attach_node_sysfs) from [<c0c0f8b8>] (__of_changeset_entry_apply+0x204/0x290)
[ 33.950416] [<c0c0f8b8>] (__of_changeset_entry_apply) from [<c0c0fc2c>] (__of_changeset_apply+0x30/0xd0)
[ 33.959882] [<c0c0fc2c>] (__of_changeset_apply) from [<c0c15040>] (of_overlay_create+0x258/0x318)
[ 33.968744] [<c0c15040>] (of_overlay_create) from [<bf13f210>] (dtbocfg_overlay_item_status_store+0xb4/0x110 [dtbocfg])
[ 33.979522] [<bf13f210>] (dtbocfg_overlay_item_status_store [dtbocfg]) from [<bf12f974>] (configfs_write_file+0xf0/0x19c [configfs])
[ 33.991424] [<bf12f974>] (configfs_write_file [configfs]) from [<c04b41d4>] (__vfs_write+0x3c/0x128)
[ 34.000545] [<c04b41d4>] (__vfs_write) from [<c04b50b0>] (vfs_write+0xb4/0x190)
[ 34.007846] [<c04b50b0>] (vfs_write) from [<c04b5ec8>] (SyS_write+0x4c/0xa0)
[ 34.014889] [<c04b5ec8>] (SyS_write) from [<c03095a0>] (ret_fast_syscall+0x0/0x3c)
[ 34.022449] Code: e7924001 e3540000 0a000067 e5963014 (e7943003)
[ 34.028634] ---[ end trace 5fb0fc71c464fffb ]---
I don't know what to do with this. I'll try different versions, but otherwise I have no idea.
Edit: It also happens for 7b166af, which I reckon is the earliest commit that I can switch to, considering I'm running 4.8.17.
Also:
# zcat /proc/config.gz | grep -i OVERLAY
CONFIG_OF_OVERLAY=y
# lsmod | grep -P "udmabuf|dtbo|fpgacfg|zptty"
fpgacfg 20480 0
udmabuf 20480 0
dtbocfg 16384 4
configfs 36864 2 dtbocfg
zptty 16384 0
# find /config
/config
/config/device-tree
/config/device-tree/overlays
/config/device-tree/overlays/fpgacfg0
/config/device-tree/overlays/fpgacfg0/dtbo
/config/device-tree/overlays/fpgacfg0/status
# find /sys/kernel/config/device-tree
/sys/kernel/config/device-tree
/sys/kernel/config/device-tree/overlays
/sys/kernel/config/device-tree/overlays/udmabuf4
/sys/kernel/config/device-tree/overlays/udmabuf4/dtbo
/sys/kernel/config/device-tree/overlays/udmabuf4/status
/sys/kernel/config/device-tree/overlays/fpgacfg0
/sys/kernel/config/device-tree/overlays/fpgacfg0/dtbo
/sys/kernel/config/device-tree/overlays/fpgacfg0/status
# echo 1 > /sys/kernel/config/device-tree/overlays/udmabuf4/status
[ 1359.453555] dtbocfg_overlay_item_create: failed to unflatten tree
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.