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libsel4simple-default

Implementation of simple interface for master branch of seL4.

libsel4simple-stable

Implementation of simple interface for the experimental branch of seL4.

libsel4utils

seL4 specific OS utility library -- implements threads, processes, virtual memory, elf loading etc.

libsel4vka

Allocation interface for seL4 -- all allocators should implement this interface.

libsel4vspace

Interface for virtual memory management on seL4.

libsystem_and_linker

Linker, libSystem and other stuff for Magenta.

libutils

OS independent utilities library

linux

Linux kernel source tree

llvm-project

Fork of LLVM adding CHERI support

musllibc

newlib

Newlib adapted to run on baremetal MIPS QEMU

newlib-cheri1

objdl

Dynamic Object File Loading under RTEMS and Linux etc.

or1k-gcc

or1k-rtems

or1k and RTEMS related stuff

or1k-src

OpenRISC 1000 port for sourceware.org's src tree (binutils, gdb, newlib, etc.)

orpsoc-cores

Core description files for FuseSoC

piccolo

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

project-edge

This is a complete SoC design built around MIPS core that's supporting MIPS-1 ISA. It has been completey designed from scratch by me part of my graduation project and has an opencore web-page.

projects_libs

qemu

Official QEMU mirror

qemu-icecap

riscv-binutils-gdb

RISC-V port of GDB: the "riscv-next" branch is a queue for upstream submission and will be rebased

riscv-gcc

riscv-isa-sim

RISC-V Functional ISA Simulator

riscv-pk

RISC-V Proxy Kernel

riscv-qemu

QEMU with RISC-V (RV64G, RV32G) Emulation Support

riscv-rtems-patches

This is just a public repo to include rtems-riscv related patches (fetched from rtems-source-builder) until they get merged upstream

riscv-sel4

rtems

Kernel, networking, file-systems, drivers, BSPs, samples, and testsuite.