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Hanna Lee's Projects

learning_gem5 icon learning_gem5

Learning gem5 is a work-in-progress book to help gem5 users get started using gem5.

mathworks-excellence-in-innovation icon mathworks-excellence-in-innovation

Capstone and senior design project ideas for undergraduate and graduate students to gain practical experience and insight into technology trends and industry directions.

mcunetv2 icon mcunetv2

MCUNetV2: Memory-Efficient Patch-based Inference for Tiny Deep Learning

opencl-caffe icon opencl-caffe

This is a Experimental version of OpenCL by AMD Research, we now recommend you to use The official BVLC Caffe OpenCL branch is over at Caffe branch now at https://github.com/BVLC/caffe/tree/opencl

openlib.cs icon openlib.cs

📚 A Collection of Free & Open Resources for University Coursework in Computer Science.

parlai icon parlai

A framework for training and evaluating AI models on a variety of openly available dialogue datasets.

pixi.js icon pixi.js

The HTML5 Creation Engine: Create beautiful digital content with the fastest, most flexible 2D WebGL renderer.

pytorch icon pytorch

Tensors and Dynamic neural networks in Python with strong GPU acceleration

ramulator icon ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

ramulator-pim icon ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL 2015 paper by Kim et al. at https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf Ramulator-PIM is used in the DAC 2019 paper by Singh et al. at https://people.inf.ethz.ch/omutlu/pub/NAPEL-near-memory-computing-performance-prediction-via-ML_dac19.pdf

rowhammer icon rowhammer

Source code for testing the Row Hammer error mechanism in DRAM devices. Described in the ISCA 2014 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/dram-row-hammer_isca14.pdf.

soc-riscv icon soc-riscv

System on Chip with RISCV-32 / RISCV-64 / RISCV-128

stanfordnlp icon stanfordnlp

Official Stanford NLP Python Library for Many Human Languages

tensorrt icon tensorrt

TensorRT is a C++ library for high performance inference on NVIDIA GPUs and deep learning accelerators.

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