Designing, simulating, building, and testing an arithmetic logic unit with 16 different operations

In this lab students will design, simulate, build and test an Arithmetic Logic Unit (ALU), employing Quartus II as a development environment and the Altera DE2-115 board as experimental platform. ALU has to execute 16 different operations on two operands of 4 bits, and will provide a 4-bit result along with 4 status bits (Overflow, Sign, Zero, Carry). The input operands will be generated by slide switches, while the result and the status bits will be displayed on LEDs.