This repository holds the code for a CPU and OS kernel for a Nexys4 board. This project extends a the original one with adding :

• A compatibility to the Nexys4 board
• The possibility to use the rj45 port of the Nexys4 board for Ethernet communications

This actually is several projects:

• a CPU (called CRAPS), written in VHDL;
• a OS kernel that runs on it, written in a C subset;
• a compiler to compile the C subset to CRAPS assembly;
• a monitor/debugger for the CRAPS processor;
• a shell and several tasks that run in the OS.

The on-board OS can communicate with a computer through a serial port. It can also use the swiches, buttons and seven-segment display on the board.

See this screencast for an example of a shell session.

The processor is a CRAPS processor, a RISC processor.

The processor is written in VHDL. You can then use Digilent Adept or Xilinx ISE to program the FPGA.

The processor runs CRAPS assembly. You can use crapsc to compile CRAPS assembly to CRAPS bytecode.

The kernel is written in moc, a C-like language. We provide a compiler to compile it to CRAPS assembly.

The compile-craps script wraps the compiler with the cpp preprocessor.

The crapsdb program can upload code on the board, start the operating system and monitor the CPU state and the memory.