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f-eval-boards's Issues

Silkscreen for pins

For the programming header, having the description on the copper layer is fine.

But for the other pins, it would be good to have their names in silkscreen.

This should be easy for the s08(a,b) boards, but the s16(a) boards will need a bit of redesign, since there is a resistor in the space needed for the name of the upper right pin.

Make board narrower to save one row on breadboards

The boards currently have some overhang on the left and right side.

Not having that overhang would improve usability on breadboards, but require some rerouting and more vias.

Still, making the change seems worth it.

A board for 24-pin SOIC devices

The PFC460 and PGS134 are available in a SOP24 (300 mil) package. It would be nice to have a board supporting these powerful devices.

Migrate to lepton?

The schematics were crated using gEDA gschem. But it seems the lepton fork now has more momentum (e.g. the gEDA Debian maintainer switched to lepton). It might make sense to migrate to lepton for the schematics (like pcb-rnd is already used instead of gEDA pcb for the pcb layout).

This is not urgent, as the current schematics were done using pre-fork gschem, so they can be opened in both current gEDA gschem and lepton.

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