SCHEMATIC See board construction in Assembly IBOM

Quick design prototype for a shift registrer based expandable mux, in theory the board should be infinitely stackable, but you will encounter some interferance and delay issues with she shiftregisters if you use too many boards.

The board has a SPI-input j1, a 2.54mm dual row idc header with a pinout:

The spi shift register is daisy chained so the output of each 8 channel register is connected to the next in line, and the last register is buffered and sent out SPI-output j2, enabling the possibility to stack as many boards you want without any customisation of the boards.

There are 8 shift registers daisy chained on the board, each shift register has 8 output channels, and each register is connected to two relay banks, using output 1,2,3 for relay bank 1 and 5,6,7 for relay bank 2, channel 4 and 8 are left open to get a full byte for each relay group.

Sending 1110 value to the shift register would turn on the three first relays in the mux (channel 1)

Each relay bank has the following posibilities

On/off bit, this connects/disconnects the channel from the output ai/pow bit, Analog input/ power, this selects if the channel is used for power or analog in/out bit, This decides if the channel is an "positive" or "negative".

the fourth bit is not used, and the fift bit is the first bit of the next channel and on the second channel the eight bit is not used. This pattern repeats through all the 16 channels on the board.so if you send b00001110, that makes the second channel route to power with positive polarity. If you connect another boards J1 (spi input) to the first boardds J2 (Spi output) with an idc cable, the second boards first channel would be bit number (4*16+1) = bit 65.

Using this method, any channel on any daisychained board can be connected to the output_p,output_n,analog_p or analog_n on the idc connector just using a bit sequence sent through an SPI output.

Read about the shift register here