fossasia / pslab-hardware Goto Github PK

Let's follow the same structure of documentation as in our software projects. Please add additional information into Readme.md e.g. chat channel, communication, project structure, best practices and images.

Also keep documentation images for the project in /docs/img/.

A good example for documentation in a repository is here: https://github.com/fossasia/open-event-orga-server

Older project files need to be archived so the main and final PCB files will be available when the repo is open. Following directories need to be moved to an archive;

• PSLab KiCAD
• PSLab KiCAD V2
• PSLab KiCAD V3

Below are considerations for hardware production from email exchanges with our partner at the Fraunhofer Institute and PCB manufacturer.

The BOM allows to extract these information as well in manual fashion, however, most CAD tools will provide this info alongside the above mentioned pick and place information in one machine-readable file. So, if you verify the capabilities of KiCAD on the former, please check also on the latter requriements.
If KiCad is not able to do so, well, then back to manual :), same goes with the keep-out areas underneath the PCB for positioning of support pins during the printing process. With a "nest" (see below), this will not be needed.

As to the PCB itself - could you check with your PCB supplier whether he could put the PCBs in a manufacturing panel ready for singulation either by milling, rolling blade separator (e.g. https://www.cab.de/de/elektronik/nutzentrenner/maestro-2-2m/) or hook knife (e.g. https://www.cab.de/de/elektronik/nutzentrenner/stegtrenner-hektor-2/). Milling will get the best contour precision (this is what you have now, but with separation prior assembly), the others will leave some minor jagged edges.
If the vendor is happy to panelize this for you, I would suggest a minimum 2x2, but for the sake for flexibility and speed preferrably a 3x6 (or any other option up to 460x460mm, suitable for print, assembly and soldering).
Here now the additional request - for the panels, we would need alignment marks, circles with min. 1mm/max 3mm diameter, exposed from any solder resist, to have the cameras identify the "copper pad positions" and then place the components into their final position. Without any alignment marks, the assembly system is "blind". This -in consequence- means if say we need to work on the singulated PCB, not only the total assembly time will go up, but also a dedicated nest with alignment marks would need to be built, the singulated PCB positioned relatively precisely into that nest, thus making the PCB ready for full-auto assembly. Can also be done, but is less elegant and "manufacturing like", compared to a panelization service by the PCB vendor :)

For panelization, please note in the discussion with the vendor these additional needs

• free area on the two "long" sides to allow for PCB-panel clamping: min3, preferred 5mm each side
• preferred surface finish is NiPdAu ("enepig"), NiAu, tin (Sn) or Ag (most expensive!!). Also OSP can be used BUT note that any lower side population or repair will then be more critical due to the oxidation.
  Please ask you vendor for a sample PCB to assess the solderability with the paste/reflow combination.

Now to an additional (future adressing) aspects.
It seems that the core elements could be "squeezed" into modules, which can be modified if a new generation of µC or DAC appears. This will forego the need to design the whole PCB anew for the new generation, as it all can be handled on the module. Also, these modules can be significantly shrunk, if miniaturization needs arises in the future. You may want to consider this thought in a design revision of the future.

The error message received is as follows:

An example can be found here :

sudo: required
before_install:
- git clone https://github.com/KiCad/kicad-library-utils /home/travis/build/kicad-library-utils

script:
- sudo bash /home/travis/build/kicad-library-utils/pcb/travis/check_all.sh $TRAVIS_BUILD_DIR

It uses tools provided by KiCAD for verifying schematics

The modified voltage regulator module is designed in the schematic only. Need to develop the PCB layout for the design!

Actual Behaviour

Waveforms above 50 kHz appear distorted.

Expected Behaviour

Waveforms should appear as they are, as per specifications (there's no specification listed on the maximum frequency of the oscilloscope channels)

Steps to reproduce it

1. Apply signal using external function generator to oscilloscope channel of PSLab; verify with external oscilloscope
2. View signal in oscilloscope app; signal is distorted.
3. Measure output of buffer amplifier at signal conditioning stage.

LogCat for the issue

Not applicable

Screenshots of the issue

Refer to attached video @ https://gofile.io/?c=FZKiRT

PSLab App Screenshot:

Op-amp output:

Would you like to work on the issue?

Am willing to help.

Currently the tolerance levels of the capacitors and resistors are of lowest tolerance level.

Ideal to specify the maximum tolerance level for the capacitors and resistors for production ease without affecting the function of PSLab.

To view 3D view of the PCB with components, step files is an easy more practice way for anyone who doesn't have KiCAD installed.

Arduino Uno enclosures can be purchased at a cheap cost saving the trouble going through designing and building a custom enclosure. To facilitate that, the PCB needs to be changed to fix in to an Arduino Uno form factor.

Assembly process requires BoM file which lists out all the components we want to get soldered onto the board.

There are better chips available for future versions of PSLab. One recommendation is LPC43S70FET256: 32-bit ARM Cortex-M4 + 2 x M0 MCU; 282 kB SRAM; Ethernet; two HS USBs; 80 Msps 12-bit ADC; configurable peripherals, AES engine

https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc4300-cortex-m4-m0/32-bit-arm-cortex-m4-plus-2-x-m0-mcu-282-kb-sram-ethernet-two-hs-usbs-80-msps-12-bit-adc-configurable-peripherals-aes-engine:LPC43S70FET256

Because of the on board 80 MSPS ADC, 6 channel and so the oscilloscope function would be able to capture faster signals and 12 bit accuracy should be sufficient enough for most uses. It will still be available for at least 8 years, according to NXPs roadmap. The price is comparable to the STM32L4.

In the schematics, PIC24EP64GP204 micro-controller is used. But in firmware PIC24EP256GP204 micro-controller is used. Since the program memory usage and other functionalities are not fascilitated by the 64kB version, it needs to be changed to a higher 256kB version which is currently used in the PSLab devices.

BOM does not reflect the change of tolerance in components.

To do:
Update part number and description

Functionality of each pin in PSLab needs to be documented in the readme file.

ESP8266 module can't fit any casing because of external antenna

Current device uses Mini B type USB port. Since Micro B type is a common cable, change the port to that type.

Grouping labels with long brackets and only identify pin numbers inside that group,
instead of duplicating text,
offers the opportunity to have simple board translation in another or 2 other languages

• Add fiducial marks
• Penalize (3 x 2) / (1 x 1)
• Add boundaries
• BoM with coordinates and part numbers

To make it easy and cheaper to assemble, transfer all the circuit components to the top side having a form factor of Arduino Mega

currently the design files are designed for more for pick & place machine than SMD.

Some parts are not SMD compatible like the microusb and headers

Actual Behaviour
Currently there is no instrument that is able to measure ampere.

Expected Behaviour
There should be an instrument to measure the ampere

Would you like to work on the issue?

Anyone.

Actual Behaviour
Currently there is no instrument that is able to measure watts.

Expected Behaviour
There should be an instrument to measure the watts
Can also integrate watts to multimeter, oscilloscope , etc

Would you like to work on the issue?

Anyone.

In production, different types of pin headers will be assembled (4pins, 6pins etc). The exact pin count and number of instances should be updated in BoM

The used RGB LED is discontinued from production. Hence the component will not be available for manufacturing.
In the current implementation, there is a separate LED used alongside this LED. So it can be removed from the schematics.

Hello,

I'm interested in having PSLab hardware. But I don't know the steps to fabricate one, since SMT assembly isn't available in my country.

Are you willing to sell ready-made PSLab kits through your website?

If no,
I've found PCB cart to make some copies. I don't know which format they accept.

It would be nice if you package the files in an amateur-friendly zip file with the instructions and your preferred PCB manufacturer if possible

Thank you

Current board does not has anything to state which production batch with which version of the firmware within.

We should include the firmware version number and the hardware version number to be printed on the silkscreen. This also future proof issues such as understanding BOM list of that particular batch and also to track if there is any faulty production batch.

Current pinhole size doesn't accounts for the +- difference as stated in the blueprint.

Need to account for the difference and also to take SMD machine into consideration rather than pick & place machine.

Parts to add

• SPI Connector (External displays etc..)
• Micro SD Card slot
• CP2102 IC replacing MCP2200 and supporting crystal (Small size, less components. Need to review on this)
• Connectors to support easy programming for ESP chips
• Replace LM1117MPX-3.3/NOPB regulator with LDFM33PVR by STMicroelectronics which gives better performance, reduced space and (about half the price?)
• Test points to validate voltages received at oscilloscope OpAmps
• Reset option while using ESP and UART simultaneously
• RTC Module

There are some overlapping edges in PCB which is not visible. They need to be removed as there are warnings thrown off by 3D model generating tools because of that

From the ethical point of view are tantalum capacitors critical, cause tantalum is a conflict mineral - see link below. Another point are the cost of this capacitor. If the project doesn't need the high capacitance with small geometrical size, you should think about the phase out of these caps.

https://www.electronicdesign.com/blog/conflict-minerals-and-tantalum-capacitor-supply-chain

https://de.farnell.com/texas-instruments/lmv324idr/op-verst-4x-nied-spann-r-r-ausg/dp/1102986

In the readme file, the PCB layout needs to be updated with the new design.

Users might want to use something that requires more power than what the current USB (5V) can output such as a pump. Idea is to have a power source input pin for user to plug in external power source such as a battery and use PSLab to regulate and manage the power flowing.

PSLab pin layout needs updation with the inclusion of Bluetooth and new modifications.

Lets avoid proprietary formats if possible.

Current pinhole size for the female headers is too big, causing the pin headers to be not straight as well.

Will get the blueprint and attach the blueprint for the female headers later on.

For documentation purposes and casing we need schematic drawings
a) from top view - Example:

b) from side view with the USB connecting hole - Example:

Please also add images of the drawings to https://docs.google.com/document/d/1ri86SopqFQfGE4EmKPY1KRELkVEmilQp_cFefCcmkak/edit#

Current PCB has changed to proceed into production. The PDF files and the images in the readme files need to be updated.

As noticed by some people, wave generators are directly connected to chip

(unsure if the chip provides protection itself)

PSLab KiCAD/proto1.lib does not currently pass the automatic schematic library testing utility provided by KiCAD.
The following procedure can be followed to check the errors

git clone https://github.com/KiCad/kicad-library-utils 
sudo kicad-library-utils/schlib/checklib.py <path to PSLab\ KiCAD>/proto1.lib 

at present, violations of the following nature are shown by the checklib.py utility

Checking symbol 'myUSBMB':
  Violating Rule 4.10 - Part metadata
  Violating Rule 4.12 - Footprint filters
  Violating Rule 4.2 - Symbol visual style
  Violating Rule 4.5 - Pin orientation
  Violating Rule 4.9 - Default fields
Checking symbol 'tp':
  Violating Rule 4.1 - Pin placement
  Violating Rule 4.10 - Part metadata
  Violating Rule 4.12 - Footprint filters
  Violating Rule 4.8 - Field text size
  Violating Rule 4.9 - Default fields

issue #11 will need this to be addressed first

What is the voltage needed to power the operational amplifiers?
Can they be powered by batteries?
Is there any step up converter, to power the opamps to a high voltage using USB?

An example is of the current capacitors' list which consist of different brands such as AVX, Taiyo-Yuden, KEMET.

It should be standardised to only one brand such as Samsung.

Is it possible to make pslab available in a two-layer version? having 4 layers makes PCB fabrication pretty expensive.

Maybe you can increase the area for it to be like a tablet if needed, in my opinion, it's more important that the circuit becomes cheap and easy to fabricate than to keep it small in size

Thanks

I checked the foot print of the PCB and it looks like this to me! Is it same for others?

Sigrok (https;//sigrok.org/) is useful FOSS to observe signals (analog or digital).
It can be used to decode signal of UART communication, and/or I2C communication.
Using PSLab hardware is good for education.

In the next version upgrade, add a socket to support SPI connections externally. (Currently it is supported internally).

Possible space to place the pin headers is next to I2C connectors.