Using MemProcFS, the latest version of the firmware on Intel i9-10850k (Z490) results in intermittent failures.

Log output:
Device Info: FPGA: Bad PCIe TLP received! Should not happen!

Other than this, it seems to be working perfectly.

Hello,ekknod,If I use a different network card device,Which values need to be modified in this part by myself?
I read some simple tutorials beforehand,they said I need obtaining the register addresses for the device by wiki or ida,but no specific acquisition method was pointed out. For example, if I use ida pro to reverse drive,What clue do I use to locate this value?

May I ask how you obtained this data

else begin if (rd_addr[10:9] == 2'b01) begin case ({rd_addr32, 2'b00}) {base_address_register + 16'h2000} : begin data_8 <= #TCQ 1; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2200} : begin data_8 <= #TCQ 2; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2204} : begin data_8 <= #TCQ 3; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2208} : begin data_8 <= #TCQ 4; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h220C} : begin data_8 <= #TCQ 5; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2210} : begin data_8 <= #TCQ 6; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2218} : begin data_8 <= #TCQ 7; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h221C} : begin data_8 <= #TCQ 8; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2220} : begin data_8 <= #TCQ 9; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2224} : begin data_8 <= #TCQ 10; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h2228} : begin data_8 <= #TCQ 11; rd_data_raw_o <= #TCQ 32'hDEADBEEF; end {base_address_register + 16'h4020} : rd_data_raw_o <= #TCQ 32'h001800FF; {base_address_register + 16'h4028} : rd_data_raw_o <= #TCQ 32'h00000060; {base_address_register + 16'h4038} : rd_data_raw_o <= #TCQ 32'h00000002; {base_address_register + 16'h407C} : begin case (data_8) 1 : rd_data_raw_o <= #TCQ 32'h0000A55A; // EEPROM MAGIC 2 : rd_data_raw_o <= #TCQ 32'h00000004; // EEPROM_SIZE 3 : rd_data_raw_o <= #TCQ 32'h0000FFFB; // EEPROM_CHECKSUM 4 : rd_data_raw_o <= #TCQ 32'h0000E00E; // EEPROM version + revision 5 : rd_data_raw_o <= #TCQ 32'h0000E00E; // EEPROM_ANTENNA (2.4ghz, 5.0ghz) 6 : rd_data_raw_o <= #TCQ 32'h00000000; // EEPROM_REGDOMAIN (location data) 7 : rd_data_raw_o <= #TCQ 32'h00009C64; // EEPROM_MAC0 (64:9C) 8 : rd_data_raw_o <= #TCQ 32'h00000881; // EEPROM_MAC1 (81:08) 9 : rd_data_raw_o <= #TCQ 32'h0000C0C4; // EEPROM_MAC2 (C4:C0) 10 : rd_data_raw_o <= #TCQ 32'h00000100; // EEPROM_RXTX (00,01) 11 : begin rd_data_raw_o <= #TCQ 32'h00000000; data_8 <= #TCQ 0; end default : rd_data_raw_o <= 32'h00000000; endcase end

Hey Ekknod - thanks for sharing this awesome firmware code. A lot of people learning FPGA internals from your generosity. I know I have.

I want to make a note about an issue that I have had, and how I fixed it.

Problem

Sometimes when Windows goes to sleep, or even just idles for a while, the machine will start stuttering very badly. (cursor lag, audio lag, can't drag windows around, etc). A PC reboot is required. This assumes of course a pcie fpga is plugged in with a variant of this firmware.

Fix

I've found that going to Device Manager -> Network Adapters -> Qualcomm Atheros AR9287 Wireless Network Adapter -> Power Management -> uncheck "Allow the computer to turn off this device to save power solves this issue.

If you modify + flash the firmware you may have to repeat this step.

Cheers,
Hunter

(feel free to close this issue. Hopefully someone who runs into this issue can search closed issues for the solution)

I been test all 75T build. Only 2 working. But all showing this "Device Info: FPGA: Bad PCIe TLP received! Should not happen!" error in speed testing every 30 sec. I didnt know where to start to fix this.

After flashing the card and Windows has installed the device, rebooting will cause extreme slowdowns while loading windows and for the first few minutes of the OS running!

My personal work-around is by using a script to uninstall the device whenever I turn off my PC:

foreach ($dev in (Get-PnpDevice | Where-Object {$_.Name -like "DEVICE NAME"})) {
    &"pnputil" /remove-device $dev.InstanceId;
}

Oddly enough, uninstalling the device immediately fixes the issue and uninstalling (i.e. above) before the Windows boots will also fix it.
I still have odd audio stuttering every now and then (~1-5 minute intervals just a quick stutter) with the ghetto solution.

The hardware I'm running is a MSI Z690, Intel i5-13600KF, CaptainDMA Screamer Squirrel

First of all nice release @ekknod :)

I tried to run your fun - hooker but unfortunately it doens't work; After reinstalling driver it only prints out 640_done:

settings are:
Capture kernel, Enable verbose, Pass-Through and Capture events.

What am I missing?

I apologize for asking such a foolish question, but I would like to know why, when I use your latest version for building (without making any modifications), the build result that I flash into my Lurker doesn't have any response after I start my computer. The network device that everyone sees is not listed in my Device Manager, and I'm unable to use it.

Can I attempt to modify the MAC address? How can I do that?

Stuck on the startup screen, Act II.

Hello ekknod,

Firstly, I would like to extend my gratitude for your efforts in maintaining the pcileech-wifi project. It's been an invaluable resource for the community.

I'm reaching out to report a recurring issue that I've encountered, which I believe might be of significance to other users as well. The issue pertains to an error message that is displayed under certain conditions: "Device Info: FPGA: Bad PCIe TLP received! Should not happen!"

Here's a brief description of the context in which the error occurs:

Thank you for your time and consideration. I'm looking forward to your thoughts and any potential solutions you might suggest.

Best regards,
[github.com/uk0]

您好作者，我想问下该如何生成Captain 35T的固件我看到仓库中只有75T的代码，另外请问作者是否有PayPal的捐赠方式 我是一位来之**的朋友没有虚拟货币钱包

I been test 75T. Doesn't working. But all showing this "Device Info: FPGA: Bad PCIe TLP received! Should not happen!" error in speed testing every 30 sec. I didnt know where to start to fix this. Even if I disabled wifi from system, still doesn't work.

Hello. I compiled and flashed the board without changing the code, and it gives me an error within a minute of work:
Device Info: FPGA: Bad PCIe TLP received! Should not happen!

Windows 11 Pro 22H2 22621.2861
11th Gen Intel(R) Core(TM) i5-11600K
Gigabyte Z590 GAMING X(rev. 1.0) Bios latest

Hello,

Have a quick question, normally with my other firmware i do have a pcie_7x_0.xci which allow me to configure a lot of things.

But with this firmware, after building i don't have this file.

Maybe it is because i'm using vivado 2023 ?

Saw your post and def +rep. Went over the code a bit and decided to build it to test before i start modifying and hopefully pushing the full device emulation ball further for anticheat testing.

currently as is, with no modification when compiled the device has a code 10 failure to start like most broken FW on the market. Aswell as a total failure of any ability to read the memory space, even in a tiny algo and a manual map.

running the newest version of windows 11. which i suspect could be the issue right off the bat.

I am currently downloading Vivado 2023( i see it referenced in your generate.bat instead of 2022)
will retest compiling it on that and then trying to boot with windows 10 instead of windows 11.

Machine used to compile:
running wind 11.
random fucking laptop, not important.
however i compiled with Vivado v2022

my system is as follows :
13900k
z690 asus board
4090
LeetDMA

Basically everything indicated by pcileech-fpga + enable autoclear etc...
I am also wondering if with your firmware it is possible to modify blocks 40-90 of the config space.

Thank you.

I have a file for pcileech_squirrel. Test Vanguard with win10 1909-22h2 works well.
for pcileech_squirrel.zip later I will test on win11 22h2
but how is available on win10?
ps: This project(pcileech-wifi) test Vanguard with win11, I got a error code 43 on my 4090.when i remove dma 4090 works well.

Your code encountered the following issues while compiling in Vavido
The core of 35T cannot be compiled and encountered this error.
The core of 75T and 100T can be compiled smoothly

[DRC UTLZ-1] Resource utilization: RAMB18 and RAMB36/FIFO over-utilized in Top Level Design (This design requires more RAMB18 and RAMB36/FIFO cells than are available in the target device. This design requires 109 of such cell types but only 100 compatible sites are available in the target device. Please analyze your synthesis results and constraints to ensure the design is mapped to Xilinx primitives as expected. If so, please consider targeting a larger device.)

im using 35T 。i want know How to solve this problem?

The project doesn't seem to be able to keep the data in a register, but instead return the preset data when it receives a read request?
Because when reading the bar of a normal PCIe device, the data is continuous:
When the data is 0123456789abcdef, the 32-bit data read by offset 0 is 01234567. Offset 2 reads as 23456789.
However, this firmware only reads correctly when it is offset by 0,4,8,c, etc., and if the offset is 1, FFFFFFFFFF is returned.
There are also some special offsets, which behave like normal devices: when the offsets are xxxx3C-3F/xxxx7C-7F.
They behave the same on the old version (implemented with tlp.sv) and the new version (using PIO).
What causes this? Can it be solved? If you are willing to help me with it, I can pay for it.

Hello,

I was just looking at the source and i couldn't find where you set the qualcomm pid vid for the emulated device.

It looks they are still set as default pcieleech to me.

@ekknod pls help me