10-bitclockwidget

10-bit Clock Widget uses 10 binary dots and their color to represent current time in 12-hour format.

avst_adder

Example setup for UVM driven Icarus Verilog Simulation

avst_adder_vl

Reference eUVM testbench for verilator

bsv101

A repo of all bsv examples

cocotb-test

Unit testing for cocotb

duvm

an implementation of UVM in D for learning purposes

edwin7026

Config files for my GitHub profile.

flight_sim_setup

A simple flight sim setup project

github-slideshow

A robot powered training repository :robot:

kalman_imu_model

A C++ model of Kalman Filter for IMUs

lfx-riscv-isac-task

RISCV-CTG and RISCV-ISAC Mentorship Additional Tasks

manim_tutorial

Files to accompany postings at talkingphysics.wordpress.com on how to use manim

myvimrc

This is my vim setup

opengl-tutorial

Code from Cherno's OpenGL tutorial videos

py8085

8085 simulator written in Python

riscv-config

RISC-V Configuration Validator

riscv-ctg

riscv-isac

river_core

RiVer Core is an open source Python based RISC-V Core Verification framework.

serv

SERV - The SErial RISC-V CPU

smitrv

An implementation of RISC-V based core from SMIT

uatg