Comments (3)
Hi Dimitar,
If the 1KHz rectangle signal have a slow edge(compare to the sample rate). There will be some sample points have a voltage(depends on the sample rate) between the min high threshold and the max low threshold. The sample result would be unpredictable. Even in the same channel, at the different time, the result may also be different.
As you mentioned, we will make the filter to be configurable in future version.
Thanks.
from dsview.
Hello DreamSourceLab,
Yes but having shifts 0 and 4 samples only between those two measurements is odd.
Can you please confirm that there is or there is not phase adjustment in the current FPGA.
Thanks
Dimitar
from dsview.
There is no any phase adjustment in the FPGA design.
Thanks.
from dsview.
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