dominc8 / audio_platform Goto Github PK

Check if using MDMA to transfer audio data between AXI SRAM and DTCM will speedup calculations. (It will for sure speedup sole calculations but it might also introduce latency).

Measure FFT on M7 and M4, compare own implementation with CMSIS-DSP

Increase amount of samples copied through dma and try to write own fir/fft/iir implementations inspired by cmsis-dsp to squeeze best performance

Create another analog-inout example but handle more than single sample per interrupt.
One way is to manually copy data from buffers, another is to trigger manually (in sw) mdma requests that will copy N samples of interleaved data to separate buffers. There are also other possibilities, benchmark each one and choose the fastest

Create tasks, for M4 and M7 separately, that will call CMSIS-DSP functions with FIR/BIQUAD/FFT implementations and measure it using variations of TCM/Cache etc.

Use FIR filters for dsp, add possibility of configuring coefficients on the fly.

Configuring coefficients might be done using joystick to choose channel/coefficients and modifying coefficients made by slider (501px wide, from -1 to 1 with granularity of 0.004).

Change sample resolution from 16bit to 24bit to simulate professional audio data

Create framework to measure tasks using pin toggling on entry/exit

Improve test environment to use any testing framework (i.e. CUnit) and improve directory structure so it will be easy to add another tests and so on.

Implement simple scheduler for M4 to enable creating queue of tasks to be executed sequentially. Example tasks that can be created always are:

• screen drawing
• input handler (touch screen, button, etc.)
• logger

Analogous to FIR filters, probably some biquad will suffice, maybe with variable number of cascades? Also compare with CMSIS-DSP

Implement FFT for more points (128?). Try using functions from CMSIS-DSP, compare to own implementation.

Enable logging from M7. Should be done by sending log messages to M4 through some queue. Might have simple scheduler on M4 as a prerequisite